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target/mips: Merge 32-bit/64-bit Release6 decodetree definitions

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We don't need to maintain 2 sets of decodetree definitions.
Merge them into a single file.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210801234202.3167676-4-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-08-01 20:29:29 +02:00
parent 4919f69c65
commit 12f79f1173
4 changed files with 19 additions and 40 deletions
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3
target/mips/tcg/meson.build
View File

@ -1,6 +1,5 @@
gen = [
decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'),
decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'),
decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']),
decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'),
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
]

27
target/mips/tcg/mips64r6.decode
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@ -1,27 +0,0 @@
# MIPS64 Release 6 instruction set
#
# Copyright (C) 2020 Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: LGPL-2.1-or-later
#
# Reference:
# MIPS Architecture for Programmers Volume II-A
# The MIPS64 Instruction Set Reference Manual, Revision 6.06
# (Document Number: MD00087-2B-MIPS64BIS-AFP-6.06)
#
&rtype rs rt rd sa !extern
&REMOVED !extern
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
REMOVED 011010 ----- ----- ---------------- # LDL
REMOVED 011011 ----- ----- ---------------- # LDR
REMOVED 101100 ----- ----- ---------------- # SDL
REMOVED 101101 ----- ----- ---------------- # SDR
REMOVED 110100 ----- ----- ---------------- # LLD
REMOVED 111100 ----- ----- ---------------- # SCD

13
target/mips/tcg/mips32r6.decode → target/mips/tcg/rel6.decode
View File

@ -5,21 +5,29 @@
# SPDX-License-Identifier: LGPL-2.1-or-later
#
# Reference:
#
# MIPS Architecture for Programmers Volume II-A
# The MIPS32 Instruction Set Reference Manual, Revision 6.06
# (Document Number: MD00086-2B-MIPS32BIS-AFP-06.06)
#
# MIPS Architecture for Programmers Volume II-A
# The MIPS64 Instruction Set Reference Manual, Revision 6.06
# (Document Number: MD00087-2B-MIPS64BIS-AFP-6.06)
&rtype rs rt rd sa
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
REMOVED 010011 ----- ----- ----- ----- ------ # COP1X (COP3)
REMOVED 011100 ----- ----- ----- ----- ------ # SPECIAL2
REMOVED 011010 ----- ----- ---------------- # LDL
REMOVED 011011 ----- ----- ---------------- # LDR
REMOVED 011111 ----- ----- ---------- 011001 # LWLE
REMOVED 011111 ----- ----- ---------- 011010 # LWRE
REMOVED 011111 ----- ----- ---------- 100001 # SWLE
@ -28,9 +36,14 @@ REMOVED 011111 ----- ----- ---------- 100010 # SWRE
REMOVED 100010 ----- ----- ---------------- # LWL
REMOVED 100110 ----- ----- ---------------- # LWR
REMOVED 101010 ----- ----- ---------------- # SWL
REMOVED 101100 ----- ----- ---------------- # SDL
REMOVED 101101 ----- ----- ---------------- # SDR
REMOVED 101110 ----- ----- ---------------- # SWR
REMOVED 101111 ----- ----- ---------------- # CACHE
REMOVED 110000 ----- ----- ---------------- # LL
REMOVED 110011 ----- ----- ---------------- # PREF
REMOVED 110100 ----- ----- ---------------- # LLD
REMOVED 111000 ----- ----- ---------------- # SC
REMOVED 111100 ----- ----- ---------------- # SCD

16
target/mips/tcg/rel6_translate.c
View File

@ -13,9 +13,8 @@
#include "exec/helper-gen.h"
#include "translate.h"
/* Include the auto-generated decoder. */
#include "decode-mips32r6.c.inc"
#include "decode-mips64r6.c.inc"
/* Include the auto-generated decoders. */
#include "decode-rel6.c.inc"
bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a)
{
@ -31,13 +30,8 @@ static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
static bool trans_DLSA(DisasContext *ctx, arg_rtype *a)
{
if (TARGET_LONG_BITS != 64) {
return false;
}
return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
bool decode_isa_rel6(DisasContext *ctx, uint32_t insn)
{
if (TARGET_LONG_BITS == 64 && decode_mips64r6(ctx, insn)) {
return true;
}
return decode_mips32r6(ctx, insn);
}