target/riscv/kvm: change KVM_REG_RISCV_FP_D to u64
KVM_REG_RISCV_FP_D regs are always u64 size. Using kvm_riscv_reg_id() in RISCV_FP_D_REG() ends up encoding the wrong size if we're running with TARGET_RISCV32. Create a new helper that returns a KVM ID with u64 size and use it with RISCV_FP_D_REG(). Reported-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20231208183835.2411523-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> (cherry picked from commit 450bd6618fda3d2e2ab02b2fce1c79efd5b66084) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -77,6 +77,11 @@ static uint64_t kvm_riscv_reg_id_u32(uint64_t type, uint64_t idx)
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return KVM_REG_RISCV | KVM_REG_SIZE_U32 | type | idx;
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}
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static uint64_t kvm_riscv_reg_id_u64(uint64_t type, uint64_t idx)
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{
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return KVM_REG_RISCV | KVM_REG_SIZE_U64 | type | idx;
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}
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#define RISCV_CORE_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_CORE, \
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KVM_REG_RISCV_CORE_REG(name))
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@ -88,7 +93,7 @@ static uint64_t kvm_riscv_reg_id_u32(uint64_t type, uint64_t idx)
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#define RISCV_FP_F_REG(idx) kvm_riscv_reg_id_u32(KVM_REG_RISCV_FP_F, idx)
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#define RISCV_FP_D_REG(env, idx) kvm_riscv_reg_id(env, KVM_REG_RISCV_FP_D, idx)
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#define RISCV_FP_D_REG(idx) kvm_riscv_reg_id_u64(KVM_REG_RISCV_FP_D, idx)
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#define KVM_RISCV_GET_CSR(cs, env, csr, reg) \
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do { \
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@ -579,7 +584,7 @@ static int kvm_riscv_get_regs_fp(CPUState *cs)
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if (riscv_has_ext(env, RVD)) {
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uint64_t reg;
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for (i = 0; i < 32; i++) {
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ret = kvm_get_one_reg(cs, RISCV_FP_D_REG(env, i), ®);
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ret = kvm_get_one_reg(cs, RISCV_FP_D_REG(i), ®);
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if (ret) {
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return ret;
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}
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@ -613,7 +618,7 @@ static int kvm_riscv_put_regs_fp(CPUState *cs)
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uint64_t reg;
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for (i = 0; i < 32; i++) {
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reg = env->fpr[i];
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ret = kvm_set_one_reg(cs, RISCV_FP_D_REG(env, i), ®);
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ret = kvm_set_one_reg(cs, RISCV_FP_D_REG(i), ®);
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if (ret) {
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return ret;
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}
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