s390x/tcg: switch to new SIGP handling code
This effectively enables experimental SMP support. Floating interrupts are still a mess, so allow it but print a big warning. There also seems to be a problem with CPU hotplug (after the main loop started). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-27-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [CH: changed insn-data.def as pointed out by Richard] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -58,9 +58,7 @@ static void s390_init_cpus(MachineState *machine)
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int i;
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if (tcg_enabled() && max_cpus > 1) {
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error_report("Number of SMP CPUs requested (%d) exceeds max CPUs "
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"supported by TCG (1) on s390x", max_cpus);
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exit(1);
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error_report("WARNING: SMP support on s390x is experimental!");
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}
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/* initialize possible_cpus */
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@ -138,7 +138,7 @@ DEF_HELPER_FLAGS_3(sske, TCG_CALL_NO_RWG, void, env, i64, i64)
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DEF_HELPER_FLAGS_2(rrbe, TCG_CALL_NO_RWG, i32, env, i64)
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DEF_HELPER_4(mvcs, i32, env, i64, i64, i64)
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DEF_HELPER_4(mvcp, i32, env, i64, i64, i64)
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DEF_HELPER_4(sigp, i32, env, i64, i32, i64)
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DEF_HELPER_4(sigp, i32, env, i64, i32, i32)
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DEF_HELPER_FLAGS_2(sacf, TCG_CALL_NO_WG, void, env, i64)
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DEF_HELPER_FLAGS_4(idte, TCG_CALL_NO_RWG, void, env, i64, i64, i32)
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DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32)
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@ -1010,7 +1010,7 @@
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/* SET SYSTEM MASK */
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C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0)
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/* SIGNAL PROCESSOR */
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C(0xae00, SIGP, RS_a, Z, r3_o, a2, 0, 0, sigp, 0)
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C(0xae00, SIGP, RS_a, Z, 0, a2, 0, 0, sigp, 0)
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/* STORE CLOCK */
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C(0xb205, STCK, S, Z, la2, 0, new, m1_64, stck, 0)
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C(0xb27c, STCKF, S, SCF, la2, 0, new, m1_64, stck, 0)
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@ -319,44 +319,14 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
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}
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uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
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uint64_t cpu_addr)
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uint32_t r3)
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{
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int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
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int cc;
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HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
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__func__, order_code, r1, cpu_addr);
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/* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
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as parameter (input). Status (output) is always R1. */
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switch (order_code & SIGP_ORDER_MASK) {
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case SIGP_SET_ARCH:
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/* switch arch */
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break;
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case SIGP_SENSE:
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/* enumerate CPU status */
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if (cpu_addr) {
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/* XXX implement when SMP comes */
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return 3;
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}
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env->regs[r1] &= 0xffffffff00000000ULL;
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cc = 1;
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break;
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#if !defined(CONFIG_USER_ONLY)
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case SIGP_RESTART:
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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break;
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case SIGP_STOP:
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qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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break;
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#endif
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default:
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/* unknown sigp */
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fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
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cc = SIGP_CC_NOT_OPERATIONAL;
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}
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/* TODO: needed to inject interrupts - push further down */
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qemu_mutex_lock_iothread();
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cc = handle_sigp(env, order_code & SIGP_ORDER_MASK, r1, r3);
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qemu_mutex_unlock_iothread();
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return cc;
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}
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@ -3710,11 +3710,12 @@ static ExitStatus op_servc(DisasContext *s, DisasOps *o)
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static ExitStatus op_sigp(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
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check_privileged(s);
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potential_page_fault(s);
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gen_helper_sigp(cc_op, cpu_env, o->in2, r1, o->in1);
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gen_helper_sigp(cc_op, cpu_env, o->in2, r1, r3);
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set_cc_static(s);
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tcg_temp_free_i32(r1);
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tcg_temp_free_i32(r3);
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return NO_EXIT;
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}
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#endif
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