pci: interrupt disable bit support
Interrupt disable bit is mandatory in PCI spec.
Implement it to make devices spec compliant.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
(cherry picked from commit b6981cb57b
)
This commit is contained in:
parent
67a2698dac
commit
0ea5709a32
29
hw/pci.c
29
hw/pci.c
@ -518,7 +518,8 @@ static void pci_init_wmask(PCIDevice *dev)
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dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff;
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dev->wmask[PCI_INTERRUPT_LINE] = 0xff;
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pci_set_word(dev->wmask + PCI_COMMAND,
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PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
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PCI_COMMAND_INTX_DISABLE);
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memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
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config_size - PCI_CONFIG_HEADER_SIZE);
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@ -938,6 +939,25 @@ static void pci_update_mappings(PCIDevice *d)
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}
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}
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static inline int pci_irq_disabled(PCIDevice *d)
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{
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return pci_get_word(d->config + PCI_COMMAND) & PCI_COMMAND_INTX_DISABLE;
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}
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/* Called after interrupt disabled field update in config space,
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* assert/deassert interrupts if necessary.
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* Gets original interrupt disable bit value (before update). */
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static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled)
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{
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int i, disabled = pci_irq_disabled(d);
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if (disabled == was_irq_disabled)
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return;
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for (i = 0; i < PCI_NUM_PINS; ++i) {
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int state = pci_irq_state(d, i);
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pci_change_irq_level(d, i, disabled ? -state : state);
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}
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}
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uint32_t pci_default_read_config(PCIDevice *d,
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uint32_t address, int len)
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{
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@ -950,7 +970,7 @@ uint32_t pci_default_read_config(PCIDevice *d,
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void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
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{
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int i;
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int i, was_irq_disabled = pci_irq_disabled(d);
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uint32_t config_size = pci_config_size(d);
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for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) {
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@ -962,6 +982,9 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
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ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) ||
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range_covers_byte(addr, l, PCI_COMMAND))
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pci_update_mappings(d);
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if (range_covers_byte(addr, l, PCI_COMMAND))
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pci_update_irq_disabled(d, was_irq_disabled);
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}
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/***********************************************************/
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@ -979,6 +1002,8 @@ static void pci_set_irq(void *opaque, int irq_num, int level)
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pci_set_irq_state(pci_dev, irq_num, level);
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pci_update_irq_status(pci_dev);
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if (pci_irq_disabled(pci_dev))
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return;
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pci_change_irq_level(pci_dev, irq_num, change);
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}
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1
hw/pci.h
1
hw/pci.h
@ -101,6 +101,7 @@ typedef struct PCIIORegion {
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#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
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#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
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#define PCI_COMMAND_MASTER 0x4 /* Enable bus master */
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#define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
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#define PCI_STATUS 0x06 /* 16 bits */
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#define PCI_STATUS_INTERRUPT 0x08
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#define PCI_REVISION_ID 0x08 /* 8 bits */
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