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hw: arm: allwinner-r40: Add emac and gmac support

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R40 has two ethernet controllers named as emac and gmac. The emac is
compatibled with A10, and the GMAC is compatibled with H3.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
qianfan Zhao 2023-06-06 10:19:33 +01:00 committed by Peter Maydell
parent 2c992b88cc
commit 0de1b69315
3 changed files with 57 additions and 2 deletions
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50
hw/arm/allwinner-r40.c
View File

@ -39,6 +39,7 @@ const hwaddr allwinner_r40_memmap[] = {
[AW_R40_DEV_SRAM_A2] = 0x00004000,
[AW_R40_DEV_SRAM_A3] = 0x00008000,
[AW_R40_DEV_SRAM_A4] = 0x0000b400,
[AW_R40_DEV_EMAC] = 0x01c0b000,
[AW_R40_DEV_MMC0] = 0x01c0f000,
[AW_R40_DEV_MMC1] = 0x01c10000,
[AW_R40_DEV_MMC2] = 0x01c11000,
@ -54,6 +55,7 @@ const hwaddr allwinner_r40_memmap[] = {
[AW_R40_DEV_UART6] = 0x01c29800,
[AW_R40_DEV_UART7] = 0x01c29c00,
[AW_R40_DEV_TWI0] = 0x01c2ac00,
[AW_R40_DEV_GMAC] = 0x01c50000,
[AW_R40_DEV_DRAMCOM] = 0x01c62000,
[AW_R40_DEV_DRAMCTL] = 0x01c63000,
[AW_R40_DEV_DRAMPHY] = 0x01c65000,
@ -82,7 +84,6 @@ static struct AwR40Unimplemented r40_unimplemented[] = {
{ "spi1", 0x01c06000, 4 * KiB },
{ "cs0", 0x01c09000, 4 * KiB },
{ "keymem", 0x01c0a000, 4 * KiB },
{ "emac", 0x01c0b000, 4 * KiB },
{ "usb0-otg", 0x01c13000, 4 * KiB },
{ "usb0-host", 0x01c14000, 4 * KiB },
{ "crypto", 0x01c15000, 4 * KiB },
@ -131,7 +132,6 @@ static struct AwR40Unimplemented r40_unimplemented[] = {
{ "tvd2", 0x01c33000, 4 * KiB },
{ "tvd3", 0x01c34000, 4 * KiB },
{ "gpu", 0x01c40000, 64 * KiB },
{ "gmac", 0x01c50000, 64 * KiB },
{ "hstmr", 0x01c60000, 4 * KiB },
{ "tcon-top", 0x01c70000, 4 * KiB },
{ "lcd0", 0x01c71000, 4 * KiB },
@ -180,6 +180,8 @@ enum {
AW_R40_GIC_SPI_MMC1 = 33,
AW_R40_GIC_SPI_MMC2 = 34,
AW_R40_GIC_SPI_MMC3 = 35,
AW_R40_GIC_SPI_EMAC = 55,
AW_R40_GIC_SPI_GMAC = 85,
};
/* Allwinner R40 general constants */
@ -276,6 +278,11 @@ static void allwinner_r40_init(Object *obj)
object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I);
object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC);
object_initialize_child(obj, "gmac", &s->gmac, TYPE_AW_SUN8I_EMAC);
object_property_add_alias(obj, "gmac-phy-addr",
OBJECT(&s->gmac), "phy-addr");
object_initialize_child(obj, "dramc", &s->dramc, TYPE_AW_R40_DRAMC);
object_property_add_alias(obj, "ram-addr", OBJECT(&s->dramc),
"ram-addr");
@ -285,6 +292,7 @@ static void allwinner_r40_init(Object *obj)
static void allwinner_r40_realize(DeviceState *dev, Error **errp)
{
const char *r40_nic_models[] = { "gmac", "emac", NULL };
AwR40State *s = AW_R40(dev);
unsigned i;
@ -442,6 +450,44 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 2,
s->memmap[AW_R40_DEV_DRAMPHY]);
/* nic support gmac and emac */
for (int i = 0; i < ARRAY_SIZE(r40_nic_models) - 1; i++) {
NICInfo *nic = &nd_table[i];
if (!nic->used) {
continue;
}
if (qemu_show_nic_models(nic->model, r40_nic_models)) {
exit(0);
}
switch (qemu_find_nic_model(nic, r40_nic_models, r40_nic_models[0])) {
case 0: /* gmac */
qdev_set_nic_properties(DEVICE(&s->gmac), nic);
break;
case 1: /* emac */
qdev_set_nic_properties(DEVICE(&s->emac), nic);
break;
default:
exit(1);
break;
}
}
/* GMAC */
object_property_set_link(OBJECT(&s->gmac), "dma-memory",
OBJECT(get_system_memory()), &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(&s->gmac), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gmac), 0, s->memmap[AW_R40_DEV_GMAC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gmac), 0,
qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_GMAC));
/* EMAC */
sysbus_realize(SYS_BUS_DEVICE(&s->emac), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->emac), 0, s->memmap[AW_R40_DEV_EMAC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->emac), 0,
qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_EMAC));
/* Unimplemented devices */
for (i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) {
create_unimplemented_device(r40_unimplemented[i].device_name,

3
hw/arm/bananapi_m2u.c
View File

@ -92,6 +92,9 @@ static void bpim2u_init(MachineState *machine)
object_property_set_int(OBJECT(r40), "ram-size",
r40->ram_size, &error_abort);
/* GMAC PHY */
object_property_set_uint(OBJECT(r40), "gmac-phy-addr", 1, &error_abort);
/* Mark R40 object realized */
qdev_realize(DEVICE(r40), NULL, &error_abort);

6
include/hw/arm/allwinner-r40.h
View File

@ -28,6 +28,8 @@
#include "hw/misc/allwinner-r40-ccu.h"
#include "hw/misc/allwinner-r40-dramc.h"
#include "hw/i2c/allwinner-i2c.h"
#include "hw/net/allwinner_emac.h"
#include "hw/net/allwinner-sun8i-emac.h"
#include "target/arm/cpu.h"
#include "sysemu/block-backend.h"
@ -36,6 +38,7 @@ enum {
AW_R40_DEV_SRAM_A2,
AW_R40_DEV_SRAM_A3,
AW_R40_DEV_SRAM_A4,
AW_R40_DEV_EMAC,
AW_R40_DEV_MMC0,
AW_R40_DEV_MMC1,
AW_R40_DEV_MMC2,
@ -51,6 +54,7 @@ enum {
AW_R40_DEV_UART6,
AW_R40_DEV_UART7,
AW_R40_DEV_TWI0,
AW_R40_DEV_GMAC,
AW_R40_DEV_GIC_DIST,
AW_R40_DEV_GIC_CPU,
AW_R40_DEV_GIC_HYP,
@ -103,6 +107,8 @@ struct AwR40State {
AwR40ClockCtlState ccu;
AwR40DramCtlState dramc;
AWI2CState i2c0;
AwEmacState emac;
AwSun8iEmacState gmac;
GICState gic;
MemoryRegion sram_a1;
MemoryRegion sram_a2;