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target/mips: Add missing 'break' for certain cases of MTTR handling

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This was found by GCC 8.3 static analysis.

Fixes: ead9360e2f

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1563220847-14630-5-git-send-email-aleksandar.markovic@rt-rk.com>
This commit is contained in:
Aleksandar Markovic 2019-07-15 22:00:46 +02:00
parent f1fadbb27a
commit 0d0304f2c4
1 changed files with 2 additions and 0 deletions
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2
target/mips/translate.c
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@ -10055,6 +10055,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
gen_mtc0(ctx, t0, rd, sel); gen_mtc0(ctx, t0, rd, sel);
break; break;
} }
break;
case 12: case 12:
switch (sel) { switch (sel) {
case 0: case 0:
@ -10064,6 +10065,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
gen_mtc0(ctx, t0, rd, sel); gen_mtc0(ctx, t0, rd, sel);
break; break;
} }
break;
case 13: case 13:
switch (sel) { switch (sel) {
case 0: case 0: