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Mention output overlaps.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5619 c046a42c-6fe2-441c-8c8c-71466251a162
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pbrook 2008-11-04 13:17:17 +00:00
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tcg/README
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@ -390,6 +390,11 @@ GCC like constraints are used to define the constraints of every
instruction. Memory constraints are not supported in this
version. Aliases are specified in the input operands as for GCC.
The same register may be used for both an input and an output, even when
they are not explicitly aliased. If an op expands to multiple target
instructions then care must be taken to avoid clobbering input values.
GCC style "early clobber" outputs are not currently supported.
A target can define specific register or constant constraints. If an
operation uses a constant input constraint which does not allow all
constants, it must also accept registers in order to have a fallback.