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target/mips: Explicitly set 2-NaN propagation rule

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Set the 2-NaN propagation rule explicitly in the float_status words
we use.

For active_fpu.fp_status, we do this in a new fp_reset() function
which mirrors the existing msa_reset() function in doing "first call
restore to set the fp status parts that depend on CPU state, then set
the fp status parts that are constant".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20241025141254.2141506-5-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-11-05 10:09:53 +00:00
parent d1ff996788
commit 0c587f1339
4 changed files with 42 additions and 17 deletions
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18
fpu/softfloat-specialize.c.inc
View File

@ -402,24 +402,10 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
/* target didn't set the rule: fall back to old ifdef choices */
#if defined(TARGET_AVR) || defined(TARGET_HEXAGON) \
|| defined(TARGET_RISCV) || defined(TARGET_SH4) \
|| defined(TARGET_TRICORE) || defined(TARGET_ARM)
|| defined(TARGET_TRICORE) || defined(TARGET_ARM) || defined(TARGET_MIPS)
g_assert_not_reached();
#elif defined(TARGET_MIPS) || defined(TARGET_HPPA) || \
#elif defined(TARGET_HPPA) || \
defined(TARGET_LOONGARCH64) || defined(TARGET_S390X)
/*
* According to MIPS specifications, if one of the two operands is
* a sNaN, a new qNaN has to be generated. This is done in
* floatXX_silence_nan(). For qNaN inputs the specifications
* says: "When possible, this QNaN result is one of the operand QNaN
* values." In practice it seems that most implementations choose
* the first operand if both operands are qNaN. In short this gives
* the following rules:
* 1. A if it is signaling
* 2. B if it is signaling
* 3. A (quiet)
* 4. B (quiet)
* A signaling NaN is always silenced before returning it.
*/
rule = float_2nan_prop_s_ab;
#elif defined(TARGET_PPC) || defined(TARGET_M68K)
/*

2
target/mips/cpu.c
View File

@ -407,9 +407,9 @@ static void mips_cpu_reset_hold(Object *obj, ResetType type)
}
msa_reset(env);
fp_reset(env);
compute_hflags(env);
restore_fp_status(env);
restore_pamask(env);
cs->exception_index = EXCP_NONE;

22
target/mips/fpu_helper.h
View File

@ -44,6 +44,28 @@ static inline void restore_fp_status(CPUMIPSState *env)
restore_snan_bit_mode(env);
}
static inline void fp_reset(CPUMIPSState *env)
{
restore_fp_status(env);
/*
* According to MIPS specifications, if one of the two operands is
* a sNaN, a new qNaN has to be generated. This is done in
* floatXX_silence_nan(). For qNaN inputs the specifications
* says: "When possible, this QNaN result is one of the operand QNaN
* values." In practice it seems that most implementations choose
* the first operand if both operands are qNaN. In short this gives
* the following rules:
* 1. A if it is signaling
* 2. B if it is signaling
* 3. A (quiet)
* 4. B (quiet)
* A signaling NaN is always silenced before returning it.
*/
set_float_2nan_prop_rule(float_2nan_prop_s_ab,
&env->active_fpu.fp_status);
}
/* MSA */
enum CPUMIPSMSADataFormat {

17
target/mips/msa.c
View File

@ -49,6 +49,23 @@ void msa_reset(CPUMIPSState *env)
set_float_detect_tininess(float_tininess_after_rounding,
&env->active_tc.msa_fp_status);
/*
* According to MIPS specifications, if one of the two operands is
* a sNaN, a new qNaN has to be generated. This is done in
* floatXX_silence_nan(). For qNaN inputs the specifications
* says: "When possible, this QNaN result is one of the operand QNaN
* values." In practice it seems that most implementations choose
* the first operand if both operands are qNaN. In short this gives
* the following rules:
* 1. A if it is signaling
* 2. B if it is signaling
* 3. A (quiet)
* 4. B (quiet)
* A signaling NaN is always silenced before returning it.
*/
set_float_2nan_prop_rule(float_2nan_prop_s_ab,
&env->active_tc.msa_fp_status);
/* clear float_status exception flags */
set_float_exception_flags(0, &env->active_tc.msa_fp_status);