fpu/softfloat: re-factor scalbn
This is one of the simpler manipulations you could make to a floating point number. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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fpu/softfloat.c
106
fpu/softfloat.c
@ -1663,6 +1663,39 @@ float64 uint16_to_float64(uint16_t a, float_status *status)
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return uint64_to_float64(a, status);
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}
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/* Multiply A by 2 raised to the power N. */
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static FloatParts scalbn_decomposed(FloatParts a, int n, float_status *s)
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{
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if (unlikely(is_nan(a.cls))) {
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return return_nan(a, s);
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}
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if (a.cls == float_class_normal) {
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a.exp += n;
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}
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return a;
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}
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float16 float16_scalbn(float16 a, int n, float_status *status)
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{
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FloatParts pa = float16_unpack_canonical(a, status);
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FloatParts pr = scalbn_decomposed(pa, n, status);
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return float16_round_pack_canonical(pr, status);
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}
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float32 float32_scalbn(float32 a, int n, float_status *status)
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{
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FloatParts pa = float32_unpack_canonical(a, status);
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FloatParts pr = scalbn_decomposed(pa, n, status);
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return float32_round_pack_canonical(pr, status);
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}
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float64 float64_scalbn(float64 a, int n, float_status *status)
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{
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FloatParts pa = float64_unpack_canonical(a, status);
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FloatParts pr = scalbn_decomposed(pa, n, status);
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return float64_round_pack_canonical(pr, status);
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}
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/*----------------------------------------------------------------------------
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| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
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| and 7, and returns the properly rounded 32-bit integer corresponding to the
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@ -6986,79 +7019,6 @@ MINMAX(32)
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MINMAX(64)
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/* Multiply A by 2 raised to the power N. */
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float32 float32_scalbn(float32 a, int n, float_status *status)
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{
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flag aSign;
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int16_t aExp;
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uint32_t aSig;
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a = float32_squash_input_denormal(a, status);
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aSig = extractFloat32Frac( a );
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aExp = extractFloat32Exp( a );
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aSign = extractFloat32Sign( a );
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if ( aExp == 0xFF ) {
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if ( aSig ) {
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return propagateFloat32NaN(a, a, status);
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}
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return a;
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}
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if (aExp != 0) {
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aSig |= 0x00800000;
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} else if (aSig == 0) {
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return a;
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} else {
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aExp++;
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}
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if (n > 0x200) {
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n = 0x200;
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} else if (n < -0x200) {
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n = -0x200;
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}
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aExp += n - 1;
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aSig <<= 7;
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return normalizeRoundAndPackFloat32(aSign, aExp, aSig, status);
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}
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float64 float64_scalbn(float64 a, int n, float_status *status)
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{
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flag aSign;
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int16_t aExp;
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uint64_t aSig;
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a = float64_squash_input_denormal(a, status);
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aSig = extractFloat64Frac( a );
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aExp = extractFloat64Exp( a );
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aSign = extractFloat64Sign( a );
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if ( aExp == 0x7FF ) {
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if ( aSig ) {
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return propagateFloat64NaN(a, a, status);
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}
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return a;
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}
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if (aExp != 0) {
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aSig |= LIT64( 0x0010000000000000 );
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} else if (aSig == 0) {
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return a;
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} else {
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aExp++;
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}
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if (n > 0x1000) {
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n = 0x1000;
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} else if (n < -0x1000) {
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n = -0x1000;
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}
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aExp += n - 1;
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aSig <<= 10;
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return normalizeRoundAndPackFloat64(aSign, aExp, aSig, status);
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}
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floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status)
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{
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flag aSign;
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@ -244,6 +244,7 @@ float16 float16_sub(float16, float16, float_status *status);
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float16 float16_mul(float16, float16, float_status *status);
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float16 float16_muladd(float16, float16, float16, int, float_status *status);
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float16 float16_div(float16, float16, float_status *status);
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float16 float16_scalbn(float16, int, float_status *status);
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int float16_is_quiet_nan(float16, float_status *status);
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int float16_is_signaling_nan(float16, float_status *status);
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