plugins: add inline operation per vcpu
Extends API with three new functions: qemu_plugin_register_vcpu_{tb, insn, mem}_exec_inline_per_vcpu(). Those functions takes a qemu_plugin_u64 as input. This allows to have a thread-safe and type-safe version of inline operations. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240304130036.124418-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240305121005.3528075-18-alex.bennee@linaro.org>
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@ -443,6 +443,13 @@ static TCGOp *append_inline_cb(const struct qemu_plugin_dyn_cb *cb,
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char *ptr = cb->userp;
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size_t elem_size = 0;
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size_t offset = 0;
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if (!ptr) {
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/* use inline entry */
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ptr = cb->inline_insn.entry.score->data->data;
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elem_size = g_array_get_element_size(cb->inline_insn.entry.score->data);
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offset = cb->inline_insn.entry.offset;
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}
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op = copy_ld_i32(&begin_op, op);
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op = copy_mul_i32(&begin_op, op, elem_size);
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op = copy_ext_i32_ptr(&begin_op, op);
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@ -92,6 +92,7 @@ struct qemu_plugin_dyn_cb {
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/* fields specific to each dyn_cb type go here */
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union {
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struct {
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qemu_plugin_u64 entry;
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enum qemu_plugin_op op;
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uint64_t imm;
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} inline_insn;
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@ -328,6 +328,22 @@ void qemu_plugin_register_vcpu_tb_exec_inline(struct qemu_plugin_tb *tb,
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enum qemu_plugin_op op,
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void *ptr, uint64_t imm);
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/**
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* qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu() - execution inline op
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* @tb: the opaque qemu_plugin_tb handle for the translation
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* @op: the type of qemu_plugin_op (e.g. ADD_U64)
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* @entry: entry to run op
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* @imm: the op data (e.g. 1)
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*
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* Insert an inline op on a given scoreboard entry.
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*/
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QEMU_PLUGIN_API
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void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu(
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struct qemu_plugin_tb *tb,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm);
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/**
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* qemu_plugin_register_vcpu_insn_exec_cb() - register insn execution cb
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* @insn: the opaque qemu_plugin_insn handle for an instruction
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@ -358,6 +374,22 @@ void qemu_plugin_register_vcpu_insn_exec_inline(struct qemu_plugin_insn *insn,
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enum qemu_plugin_op op,
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void *ptr, uint64_t imm);
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/**
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* qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu() - insn exec inline op
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* @insn: the opaque qemu_plugin_insn handle for an instruction
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* @op: the type of qemu_plugin_op (e.g. ADD_U64)
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* @entry: entry to run op
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* @imm: the op data (e.g. 1)
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*
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* Insert an inline op to every time an instruction executes.
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*/
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QEMU_PLUGIN_API
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void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu(
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struct qemu_plugin_insn *insn,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm);
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/**
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* qemu_plugin_tb_n_insns() - query helper for number of insns in TB
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* @tb: opaque handle to TB passed to callback
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@ -583,7 +615,24 @@ void qemu_plugin_register_vcpu_mem_inline(struct qemu_plugin_insn *insn,
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enum qemu_plugin_op op, void *ptr,
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uint64_t imm);
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/**
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* qemu_plugin_register_vcpu_mem_inline_per_vcpu() - inline op for mem access
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* @insn: handle for instruction to instrument
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* @rw: apply to reads, writes or both
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* @op: the op, of type qemu_plugin_op
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* @entry: entry to run op
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* @imm: immediate data for @op
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*
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* This registers a inline op every memory access generated by the
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* instruction.
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*/
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QEMU_PLUGIN_API
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void qemu_plugin_register_vcpu_mem_inline_per_vcpu(
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struct qemu_plugin_insn *insn,
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enum qemu_plugin_mem_rw rw,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm);
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typedef void
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(*qemu_plugin_vcpu_syscall_cb_t)(qemu_plugin_id_t id, unsigned int vcpu_index,
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@ -111,6 +111,18 @@ void qemu_plugin_register_vcpu_tb_exec_inline(struct qemu_plugin_tb *tb,
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}
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}
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void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu(
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struct qemu_plugin_tb *tb,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm)
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{
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if (!tb->mem_only) {
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plugin_register_inline_op_on_entry(
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&tb->cbs[PLUGIN_CB_INLINE], 0, op, entry, imm);
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}
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}
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void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn,
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qemu_plugin_vcpu_udata_cb_t cb,
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enum qemu_plugin_cb_flags flags,
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@ -136,6 +148,18 @@ void qemu_plugin_register_vcpu_insn_exec_inline(struct qemu_plugin_insn *insn,
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}
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}
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void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu(
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struct qemu_plugin_insn *insn,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm)
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{
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if (!insn->mem_only) {
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plugin_register_inline_op_on_entry(
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&insn->cbs[PLUGIN_CB_INSN][PLUGIN_CB_INLINE], 0, op, entry, imm);
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}
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}
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/*
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* We always plant memory instrumentation because they don't finalise until
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@ -148,7 +172,7 @@ void qemu_plugin_register_vcpu_mem_cb(struct qemu_plugin_insn *insn,
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void *udata)
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{
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plugin_register_vcpu_mem_cb(&insn->cbs[PLUGIN_CB_MEM][PLUGIN_CB_REGULAR],
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cb, flags, rw, udata);
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cb, flags, rw, udata);
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}
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void qemu_plugin_register_vcpu_mem_inline(struct qemu_plugin_insn *insn,
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@ -160,6 +184,17 @@ void qemu_plugin_register_vcpu_mem_inline(struct qemu_plugin_insn *insn,
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rw, op, ptr, imm);
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}
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void qemu_plugin_register_vcpu_mem_inline_per_vcpu(
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struct qemu_plugin_insn *insn,
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enum qemu_plugin_mem_rw rw,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm)
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{
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plugin_register_inline_op_on_entry(
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&insn->cbs[PLUGIN_CB_MEM][PLUGIN_CB_INLINE], rw, op, entry, imm);
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}
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void qemu_plugin_register_vcpu_tb_trans_cb(qemu_plugin_id_t id,
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qemu_plugin_vcpu_tb_trans_cb_t cb)
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{
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@ -332,6 +332,23 @@ void plugin_register_inline_op(GArray **arr,
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dyn_cb->inline_insn.imm = imm;
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}
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void plugin_register_inline_op_on_entry(GArray **arr,
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enum qemu_plugin_mem_rw rw,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm)
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{
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struct qemu_plugin_dyn_cb *dyn_cb;
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dyn_cb = plugin_get_dyn_cb(arr);
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dyn_cb->userp = NULL;
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dyn_cb->type = PLUGIN_CB_INLINE;
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dyn_cb->rw = rw;
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dyn_cb->inline_insn.entry = entry;
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dyn_cb->inline_insn.op = op;
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dyn_cb->inline_insn.imm = imm;
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}
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void plugin_register_dyn_cb__udata(GArray **arr,
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qemu_plugin_vcpu_udata_cb_t cb,
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enum qemu_plugin_cb_flags flags,
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@ -480,6 +497,12 @@ void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index)
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char *ptr = cb->userp;
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size_t elem_size = 0;
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size_t offset = 0;
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if (!ptr) {
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/* use inline entry */
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ptr = cb->inline_insn.entry.score->data->data;
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elem_size = g_array_get_element_size(cb->inline_insn.entry.score->data);
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offset = cb->inline_insn.entry.offset;
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}
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uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size);
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switch (cb->inline_insn.op) {
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@ -73,6 +73,12 @@ void plugin_register_inline_op(GArray **arr,
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enum qemu_plugin_op op, void *ptr,
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uint64_t imm);
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void plugin_register_inline_op_on_entry(GArray **arr,
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enum qemu_plugin_mem_rw rw,
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enum qemu_plugin_op op,
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qemu_plugin_u64 entry,
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uint64_t imm);
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void plugin_reset_uninstall(qemu_plugin_id_t id,
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qemu_plugin_simple_cb_t cb,
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bool reset);
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@ -28,13 +28,16 @@
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qemu_plugin_register_vcpu_init_cb;
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qemu_plugin_register_vcpu_insn_exec_cb;
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qemu_plugin_register_vcpu_insn_exec_inline;
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qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu;
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qemu_plugin_register_vcpu_mem_cb;
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qemu_plugin_register_vcpu_mem_inline;
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qemu_plugin_register_vcpu_mem_inline_per_vcpu;
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qemu_plugin_register_vcpu_resume_cb;
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qemu_plugin_register_vcpu_syscall_cb;
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qemu_plugin_register_vcpu_syscall_ret_cb;
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qemu_plugin_register_vcpu_tb_exec_cb;
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qemu_plugin_register_vcpu_tb_exec_inline;
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qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu;
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qemu_plugin_register_vcpu_tb_trans_cb;
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qemu_plugin_reset;
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qemu_plugin_scoreboard_free;
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