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target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS

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Only if Config3.ISA is 3 (microMIPS), the mode should be switched in
cpu_state_reset(). Config3.ISA is 1 for nanoMIPS processors, and no mode
change should happen.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
This commit is contained in:
Stefan Markovic 2018-08-20 12:00:27 +02:00 committed by Aleksandar Markovic
parent b3979b6fc3
commit 0bbc039680
1 changed files with 2 additions and 2 deletions
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4
target/mips/translate.c
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@ -21841,8 +21841,8 @@ void cpu_state_reset(CPUMIPSState *env)
env->CP0_Status |= (1 << CP0St_FR); env->CP0_Status |= (1 << CP0St_FR);
} }
if (env->CP0_Config3 & (1 << CP0C3_ISA)) { if (env->CP0_Config3 & (1 << CP0C3_ISA) & (1 << (CP0C3_ISA + 1))) {
/* microMIPS on reset when Config3.ISA == {1, 3} */ /* microMIPS on reset when Config3.ISA is 3 */
env->hflags |= MIPS_HFLAG_M16; env->hflags |= MIPS_HFLAG_M16;
} }