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spapr, xics, xive: Move irq claim and free from SpaprIrq to SpaprInterruptController 

These methods, like cpu_intc_create, really belong to the interrupt
controller, but need to be called on all possible intcs.

Like cpu_intc_create, therefore, make them methods on the intc and
always call it for all existing intcs.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
David Gibson 2019-09-26 14:31:13 +10:00
parent ebd6be089b
commit 0b0e52b131
5 changed files with 102 additions and 115 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

71
hw/intc/spapr_xive.c
View File

@ -487,6 +487,42 @@ static const VMStateDescription vmstate_spapr_xive = {
},
};
static int spapr_xive_claim_irq(SpaprInterruptController *intc, int lisn,
bool lsi, Error **errp)
{
SpaprXive *xive = SPAPR_XIVE(intc);
XiveSource *xsrc = &xive->source;
assert(lisn < xive->nr_irqs);
if (xive_eas_is_valid(&xive->eat[lisn])) {
error_setg(errp, "IRQ %d is not free", lisn);
return -EBUSY;
}
/*
* Set default values when allocating an IRQ number
*/
xive->eat[lisn].w |= cpu_to_be64(EAS_VALID | EAS_MASKED);
if (lsi) {
xive_source_irq_set_lsi(xsrc, lisn);
}
if (kvm_irqchip_in_kernel()) {
return kvmppc_xive_source_reset_one(xsrc, lisn, errp);
}
return 0;
}
static void spapr_xive_free_irq(SpaprInterruptController *intc, int lisn)
{
SpaprXive *xive = SPAPR_XIVE(intc);
assert(lisn < xive->nr_irqs);
xive->eat[lisn].w &= cpu_to_be64(~EAS_VALID);
}
static Property spapr_xive_properties[] = {
DEFINE_PROP_UINT32("nr-irqs", SpaprXive, nr_irqs, 0),
DEFINE_PROP_UINT32("nr-ends", SpaprXive, nr_ends, 0),
@ -536,6 +572,8 @@ static void spapr_xive_class_init(ObjectClass *klass, void *data)
xrc->get_tctx = spapr_xive_get_tctx;
sicc->cpu_intc_create = spapr_xive_cpu_intc_create;
sicc->claim_irq = spapr_xive_claim_irq;
sicc->free_irq = spapr_xive_free_irq;
}
static const TypeInfo spapr_xive_info = {
@ -557,39 +595,6 @@ static void spapr_xive_register_types(void)
type_init(spapr_xive_register_types)
int spapr_xive_irq_claim(SpaprXive *xive, int lisn, bool lsi, Error **errp)
{
XiveSource *xsrc = &xive->source;
assert(lisn < xive->nr_irqs);
if (xive_eas_is_valid(&xive->eat[lisn])) {
error_setg(errp, "IRQ %d is not free", lisn);
return -EBUSY;
}
/*
* Set default values when allocating an IRQ number
*/
xive->eat[lisn].w |= cpu_to_be64(EAS_VALID | EAS_MASKED);
if (lsi) {
xive_source_irq_set_lsi(xsrc, lisn);
}
if (kvm_irqchip_in_kernel()) {
return kvmppc_xive_source_reset_one(xsrc, lisn, errp);
}
return 0;
}
void spapr_xive_irq_free(SpaprXive *xive, int lisn)
{
assert(lisn < xive->nr_irqs);
xive->eat[lisn].w &= cpu_to_be64(~EAS_VALID);
}
/*
* XIVE hcalls
*

29
hw/intc/xics_spapr.c
View File

@ -346,6 +346,33 @@ static int xics_spapr_cpu_intc_create(SpaprInterruptController *intc,
return 0;
}
static int xics_spapr_claim_irq(SpaprInterruptController *intc, int irq,
bool lsi, Error **errp)
{
ICSState *ics = ICS_SPAPR(intc);
assert(ics);
assert(ics_valid_irq(ics, irq));
if (!ics_irq_free(ics, irq - ics->offset)) {
error_setg(errp, "IRQ %d is not free", irq);
return -EBUSY;
}
ics_set_irq_type(ics, irq - ics->offset, lsi);
return 0;
}
static void xics_spapr_free_irq(SpaprInterruptController *intc, int irq)
{
ICSState *ics = ICS_SPAPR(intc);
uint32_t srcno = irq - ics->offset;
assert(ics_valid_irq(ics, irq));
memset(&ics->irqs[srcno], 0, sizeof(ICSIRQState));
}
static void ics_spapr_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -355,6 +382,8 @@ static void ics_spapr_class_init(ObjectClass *klass, void *data)
device_class_set_parent_realize(dc, ics_spapr_realize,
&isc->parent_realize);
sicc->cpu_intc_create = xics_spapr_cpu_intc_create;
sicc->claim_irq = xics_spapr_claim_irq;
sicc->free_irq = xics_spapr_free_irq;
}
static const TypeInfo ics_spapr_info = {

110
hw/ppc/spapr_irq.c
View File

@ -98,33 +98,6 @@ static void spapr_irq_init_kvm(SpaprMachineState *spapr,
* XICS IRQ backend.
*/
static int spapr_irq_claim_xics(SpaprMachineState *spapr, int irq, bool lsi,
Error **errp)
{
ICSState *ics = spapr->ics;
assert(ics);
assert(ics_valid_irq(ics, irq));
if (!ics_irq_free(ics, irq - ics->offset)) {
error_setg(errp, "IRQ %d is not free", irq);
return -1;
}
ics_set_irq_type(ics, irq - ics->offset, lsi);
return 0;
}
static void spapr_irq_free_xics(SpaprMachineState *spapr, int irq)
{
ICSState *ics = spapr->ics;
uint32_t srcno = irq - ics->offset;
assert(ics_valid_irq(ics, irq));
memset(&ics->irqs[srcno], 0, sizeof(ICSIRQState));
}
static void spapr_irq_print_info_xics(SpaprMachineState *spapr, Monitor *mon)
{
CPUState *cs;
@ -182,8 +155,6 @@ SpaprIrq spapr_irq_xics = {
.xics = true,
.xive = false,
.claim = spapr_irq_claim_xics,
.free = spapr_irq_free_xics,
.print_info = spapr_irq_print_info_xics,
.dt_populate = spapr_dt_xics,
.post_load = spapr_irq_post_load_xics,
@ -196,17 +167,6 @@ SpaprIrq spapr_irq_xics = {
* XIVE IRQ backend.
*/
static int spapr_irq_claim_xive(SpaprMachineState *spapr, int irq, bool lsi,
Error **errp)
{
return spapr_xive_irq_claim(spapr->xive, irq, lsi, errp);
}
static void spapr_irq_free_xive(SpaprMachineState *spapr, int irq)
{
spapr_xive_irq_free(spapr->xive, irq);
}
static void spapr_irq_print_info_xive(SpaprMachineState *spapr,
Monitor *mon)
{
@ -272,8 +232,6 @@ SpaprIrq spapr_irq_xive = {
.xics = false,
.xive = true,
.claim = spapr_irq_claim_xive,
.free = spapr_irq_free_xive,
.print_info = spapr_irq_print_info_xive,
.dt_populate = spapr_dt_xive,
.post_load = spapr_irq_post_load_xive,
@ -301,33 +259,6 @@ static SpaprIrq *spapr_irq_current(SpaprMachineState *spapr)
&spapr_irq_xive : &spapr_irq_xics;
}
static int spapr_irq_claim_dual(SpaprMachineState *spapr, int irq, bool lsi,
Error **errp)
{
Error *local_err = NULL;
int ret;
ret = spapr_irq_xics.claim(spapr, irq, lsi, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return ret;
}
ret = spapr_irq_xive.claim(spapr, irq, lsi, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return ret;
}
return ret;
}
static void spapr_irq_free_dual(SpaprMachineState *spapr, int irq)
{
spapr_irq_xics.free(spapr, irq);
spapr_irq_xive.free(spapr, irq);
}
static void spapr_irq_print_info_dual(SpaprMachineState *spapr, Monitor *mon)
{
spapr_irq_current(spapr)->print_info(spapr, mon);
@ -401,8 +332,6 @@ SpaprIrq spapr_irq_dual = {
.xics = true,
.xive = true,
.claim = spapr_irq_claim_dual,
.free = spapr_irq_free_dual,
.print_info = spapr_irq_print_info_dual,
.dt_populate = spapr_irq_dt_populate_dual,
.post_load = spapr_irq_post_load_dual,
@ -572,8 +501,11 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
/* Enable the CPU IPIs */
for (i = 0; i < nr_servers; ++i) {
if (spapr_xive_irq_claim(spapr->xive, SPAPR_IRQ_IPI + i,
false, errp) < 0) {
SpaprInterruptControllerClass *sicc
= SPAPR_INTC_GET_CLASS(spapr->xive);
if (sicc->claim_irq(SPAPR_INTC(spapr->xive), SPAPR_IRQ_IPI + i,
false, errp) < 0) {
return;
}
}
@ -587,21 +519,45 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp)
{
SpaprInterruptController *intcs[] = ALL_INTCS(spapr);
int i;
int rc;
assert(irq >= SPAPR_XIRQ_BASE);
assert(irq < (spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE));
return spapr->irq->claim(spapr, irq, lsi, errp);
for (i = 0; i < ARRAY_SIZE(intcs); i++) {
SpaprInterruptController *intc = intcs[i];
if (intc) {
SpaprInterruptControllerClass *sicc = SPAPR_INTC_GET_CLASS(intc);
rc = sicc->claim_irq(intc, irq, lsi, errp);
if (rc < 0) {
return rc;
}
}
}
return 0;
}
void spapr_irq_free(SpaprMachineState *spapr, int irq, int num)
{
int i;
SpaprInterruptController *intcs[] = ALL_INTCS(spapr);
int i, j;
assert(irq >= SPAPR_XIRQ_BASE);
assert((irq + num) <= (spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE));
for (i = irq; i < (irq + num); i++) {
spapr->irq->free(spapr, i);
for (j = 0; j < ARRAY_SIZE(intcs); j++) {
SpaprInterruptController *intc = intcs[j];
if (intc) {
SpaprInterruptControllerClass *sicc
= SPAPR_INTC_GET_CLASS(intc);
sicc->free_irq(intc, i);
}
}
}
}
@ -726,8 +682,6 @@ SpaprIrq spapr_irq_xics_legacy = {
.xics = true,
.xive = false,
.claim = spapr_irq_claim_xics,
.free = spapr_irq_free_xics,
.print_info = spapr_irq_print_info_xics,
.dt_populate = spapr_dt_xics,
.post_load = spapr_irq_post_load_xics,

5
include/hw/ppc/spapr_irq.h
View File

@ -50,6 +50,9 @@ typedef struct SpaprInterruptControllerClass {
*/
int (*cpu_intc_create)(SpaprInterruptController *intc,
PowerPCCPU *cpu, Error **errp);
int (*claim_irq)(SpaprInterruptController *intc, int irq, bool lsi,
Error **errp);
void (*free_irq)(SpaprInterruptController *intc, int irq);
} SpaprInterruptControllerClass;
int spapr_irq_cpu_intc_create(SpaprMachineState *spapr,
@ -67,8 +70,6 @@ typedef struct SpaprIrq {
bool xics;
bool xive;
int (*claim)(SpaprMachineState *spapr, int irq, bool lsi, Error **errp);
void (*free)(SpaprMachineState *spapr, int irq);
void (*print_info)(SpaprMachineState *spapr, Monitor *mon);
void (*dt_populate)(SpaprMachineState *spapr, uint32_t nr_servers,
void *fdt, uint32_t phandle);

2
include/hw/ppc/spapr_xive.h
View File

@ -54,8 +54,6 @@ typedef struct SpaprXive {
*/
#define SPAPR_XIVE_BLOCK_ID 0x0
int spapr_xive_irq_claim(SpaprXive *xive, int lisn, bool lsi, Error **errp);
void spapr_xive_irq_free(SpaprXive *xive, int lisn);
void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon);
int spapr_xive_post_load(SpaprXive *xive, int version_id);