hw/ssi: Constify VMState
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-56-richard.henderson@linaro.org>
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735e354a43
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@ -1201,7 +1201,7 @@ static const VMStateDescription vmstate_aspeed_smc = {
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.name = "aspeed.smc",
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.version_id = 2,
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.minimum_version_id = 2,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32_ARRAY(regs, AspeedSMCState, ASPEED_SMC_R_MAX),
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VMSTATE_UINT8(snoop_index, AspeedSMCState),
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VMSTATE_UINT8(snoop_dummies, AspeedSMCState),
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@ -570,7 +570,7 @@ static const VMStateDescription vmstate_ibex = {
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.name = TYPE_IBEX_SPI_HOST,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32_ARRAY(regs, IbexSPIHostState, IBEX_SPI_HOST_MAX_REGS),
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VMSTATE_VARRAY_UINT32(config_opts, IbexSPIHostState,
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num_cs, 0, vmstate_info_uint32, uint32_t),
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@ -62,7 +62,7 @@ static const VMStateDescription vmstate_imx_spi = {
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.name = TYPE_IMX_SPI,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_FIFO32(tx_fifo, IMXSPIState),
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VMSTATE_FIFO32(rx_fifo, IMXSPIState),
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VMSTATE_INT16(burst_length, IMXSPIState),
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@ -390,7 +390,7 @@ static const VMStateDescription vmstate_mss_spi = {
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.name = TYPE_MSS_SPI,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_FIFO32(tx_fifo, MSSSpiState),
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VMSTATE_FIFO32(rx_fifo, MSSSpiState),
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VMSTATE_UINT32_ARRAY(regs, MSSSpiState, R_SPI_MAX),
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@ -534,7 +534,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu = {
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.name = "npcm7xx-fiu",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_INT32(active_cs, NPCM7xxFIUState),
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VMSTATE_UINT32_ARRAY(regs, NPCM7xxFIUState, NPCM7XX_FIU_NR_REGS),
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VMSTATE_END_OF_LIST(),
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@ -192,7 +192,7 @@ static const VMStateDescription vmstate_npcm_pspi = {
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.name = "npcm-pspi",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT16_ARRAY(regs, NPCMPSPIState, NPCM_PSPI_NR_REGS),
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VMSTATE_END_OF_LIST(),
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},
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@ -249,7 +249,7 @@ static const VMStateDescription vmstate_pl022 = {
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.version_id = 1,
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.minimum_version_id = 1,
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.post_load = pl022_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(cr0, PL022State),
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VMSTATE_UINT32(cr1, PL022State),
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VMSTATE_UINT32(bitmask, PL022State),
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@ -172,7 +172,7 @@ const VMStateDescription vmstate_ssi_peripheral = {
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.name = "SSISlave",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_BOOL(cs, SSIPeripheral),
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VMSTATE_END_OF_LIST()
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}
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@ -174,7 +174,7 @@ static const VMStateDescription vmstate_stm32f2xx_spi = {
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.name = TYPE_STM32F2XX_SPI,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(spi_cr1, STM32F2XXSPIState),
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VMSTATE_UINT32(spi_cr2, STM32F2XXSPIState),
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VMSTATE_UINT32(spi_sr, STM32F2XXSPIState),
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@ -353,7 +353,7 @@ static const VMStateDescription vmstate_xilinx_spi = {
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.name = "xilinx_spi",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_FIFO8(tx_fifo, XilinxSPI),
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VMSTATE_FIFO8(rx_fifo, XilinxSPI),
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VMSTATE_UINT32_ARRAY(regs, XilinxSPI, R_MAX),
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@ -1369,7 +1369,7 @@ static const VMStateDescription vmstate_xilinx_spips = {
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.version_id = 2,
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.minimum_version_id = 2,
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.post_load = xilinx_spips_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_FIFO8(tx_fifo, XilinxSPIPS),
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VMSTATE_FIFO8(rx_fifo, XilinxSPIPS),
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VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, XLNX_SPIPS_R_MAX),
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@ -1395,7 +1395,7 @@ static const VMStateDescription vmstate_xilinx_qspips = {
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.name = "xilinx_qspips",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT(parent_obj, XilinxQSPIPS, 0,
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vmstate_xilinx_spips, XilinxSPIPS),
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VMSTATE_END_OF_LIST()
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@ -1407,7 +1407,7 @@ static const VMStateDescription vmstate_xlnx_zynqmp_qspips = {
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.version_id = 1,
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.minimum_version_id = 1,
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.post_load = xlnx_zynqmp_qspips_post_load,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT(parent_obj, XlnxZynqMPQSPIPS, 0,
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vmstate_xilinx_qspips, XilinxQSPIPS),
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VMSTATE_FIFO8(tx_fifo_g, XlnxZynqMPQSPIPS),
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@ -1787,7 +1787,7 @@ static const VMStateDescription vmstate_ind_op = {
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.name = "OSPIIndOp",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(flash_addr, IndOp),
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VMSTATE_UINT32(num_bytes, IndOp),
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VMSTATE_UINT32(done_bytes, IndOp),
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@ -1800,7 +1800,7 @@ static const VMStateDescription vmstate_xlnx_versal_ospi = {
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.name = TYPE_XILINX_VERSAL_OSPI,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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.fields = (const VMStateField[]) {
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VMSTATE_FIFO8(rx_fifo, XlnxVersalOspi),
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VMSTATE_FIFO8(tx_fifo, XlnxVersalOspi),
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VMSTATE_FIFO8(rx_sram, XlnxVersalOspi),
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