hw/pci-host/sabre: Simplify code initializing variable once
We only need to zero-initialize 'val' once. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201012170950.3491912-4-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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@ -195,32 +195,25 @@ static uint64_t sabre_config_read(void *opaque,
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hwaddr addr, unsigned size)
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{
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SabreState *s = opaque;
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uint32_t val;
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uint32_t val = 0;
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switch (addr) {
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case 0x30 ... 0x4f: /* DMA error registers */
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val = 0;
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/* XXX: not implemented yet */
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break;
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case 0xc00 ... 0xc3f: /* PCI interrupt control */
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if (addr & 4) {
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val = s->pci_irq_map[(addr & 0x3f) >> 3];
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} else {
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val = 0;
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}
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break;
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case 0x1000 ... 0x107f: /* OBIO interrupt control */
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if (addr & 4) {
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val = s->obio_irq_map[(addr & 0xff) >> 3];
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} else {
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val = 0;
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}
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break;
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case 0x1080 ... 0x108f: /* PCI bus error */
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if (addr & 4) {
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val = s->pci_err_irq_map[(addr & 0xf) >> 3];
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} else {
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val = 0;
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}
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break;
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case 0x2000 ... 0x202f: /* PCI control */
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@ -229,8 +222,6 @@ static uint64_t sabre_config_read(void *opaque,
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case 0xf020 ... 0xf027: /* Reset control */
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if (addr & 4) {
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val = s->reset_control;
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} else {
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val = 0;
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}
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break;
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case 0x5000 ... 0x51cf: /* PIO/DMA diagnostics */
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@ -239,7 +230,6 @@ static uint64_t sabre_config_read(void *opaque,
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case 0xf000 ... 0xf01f: /* FFB config, memory control */
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/* we don't care */
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default:
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val = 0;
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break;
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}
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trace_sabre_config_read(addr, val);
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