tcg: Remove TCG_TARGET_HAS_GUEST_BASE define

GUEST_BASE support is now supported by all TCG backends, and is
now mandatory. Drop the now-pointless TCG_TARGET_HAS_GUEST_BASE
define (set by every backend) and the error if it is unset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
This commit is contained in:
Peter Maydell 2012-10-09 03:16:50 +00:00 committed by Riku Voipio
parent 30163d8995
commit 07e10e5de1
11 changed files with 0 additions and 26 deletions

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@ -75,8 +75,6 @@ typedef enum {
#define TCG_TARGET_HAS_deposit_i32 0 #define TCG_TARGET_HAS_deposit_i32 0
#define TCG_TARGET_HAS_movcond_i32 0 #define TCG_TARGET_HAS_movcond_i32 0
#define TCG_TARGET_HAS_GUEST_BASE
enum { enum {
TCG_AREG0 = TCG_REG_R6, TCG_AREG0 = TCG_REG_R6,
}; };

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@ -103,8 +103,6 @@ typedef enum {
#define TCG_TARGET_HAS_ext8u_i32 0 /* and rd, rs, 0xff */ #define TCG_TARGET_HAS_ext8u_i32 0 /* and rd, rs, 0xff */
#define TCG_TARGET_HAS_ext16u_i32 0 /* and rd, rs, 0xffff */ #define TCG_TARGET_HAS_ext16u_i32 0 /* and rd, rs, 0xffff */
#define TCG_TARGET_HAS_GUEST_BASE
#define TCG_AREG0 TCG_REG_R17 #define TCG_AREG0 TCG_REG_R17

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@ -125,8 +125,6 @@ typedef enum {
((ofs) == 0 && (len) == 16)) ((ofs) == 0 && (len) == 16))
#define TCG_TARGET_deposit_i64_valid TCG_TARGET_deposit_i32_valid #define TCG_TARGET_deposit_i64_valid TCG_TARGET_deposit_i32_valid
#define TCG_TARGET_HAS_GUEST_BASE
#if TCG_TARGET_REG_BITS == 64 #if TCG_TARGET_REG_BITS == 64
# define TCG_AREG0 TCG_REG_R14 # define TCG_AREG0 TCG_REG_R14
#else #else

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@ -144,9 +144,6 @@ typedef enum {
#define TCG_AREG0 TCG_REG_R7 #define TCG_AREG0 TCG_REG_R7
/* Guest base is supported */
#define TCG_TARGET_HAS_GUEST_BASE
static inline void flush_icache_range(tcg_target_ulong start, static inline void flush_icache_range(tcg_target_ulong start,
tcg_target_ulong stop) tcg_target_ulong stop)
{ {

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@ -116,9 +116,6 @@ typedef enum {
#define TCG_AREG0 TCG_REG_S0 #define TCG_AREG0 TCG_REG_S0
/* guest base is supported */
#define TCG_TARGET_HAS_GUEST_BASE
#ifdef __OpenBSD__ #ifdef __OpenBSD__
#include <machine/sysarch.h> #include <machine/sysarch.h>
#else #else

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@ -96,8 +96,6 @@ typedef enum {
#define TCG_AREG0 TCG_REG_R27 #define TCG_AREG0 TCG_REG_R27
#define TCG_TARGET_HAS_GUEST_BASE
#define tcg_qemu_tb_exec(env, tb_ptr) \ #define tcg_qemu_tb_exec(env, tb_ptr) \
((long __attribute__ ((longcall)) \ ((long __attribute__ ((longcall)) \
(*)(void *, void *))code_gen_prologue)(env, tb_ptr) (*)(void *, void *))code_gen_prologue)(env, tb_ptr)

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@ -108,5 +108,4 @@ typedef enum {
#define TCG_AREG0 TCG_REG_R27 #define TCG_AREG0 TCG_REG_R27
#define TCG_TARGET_HAS_GUEST_BASE
#define TCG_TARGET_EXTEND_ARGS 1 #define TCG_TARGET_EXTEND_ARGS 1

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@ -88,8 +88,6 @@ typedef enum TCGReg {
#define TCG_TARGET_HAS_movcond_i64 0 #define TCG_TARGET_HAS_movcond_i64 0
#endif #endif
#define TCG_TARGET_HAS_GUEST_BASE
/* used for function call generation */ /* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R15 #define TCG_REG_CALL_STACK TCG_REG_R15
#define TCG_TARGET_STACK_ALIGN 8 #define TCG_TARGET_STACK_ALIGN 8

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@ -124,8 +124,6 @@ typedef enum {
#define TCG_TARGET_HAS_movcond_i64 0 #define TCG_TARGET_HAS_movcond_i64 0
#endif #endif
#define TCG_TARGET_HAS_GUEST_BASE
#define TCG_AREG0 TCG_REG_I0 #define TCG_AREG0 TCG_REG_I0
static inline void flush_icache_range(tcg_target_ulong start, static inline void flush_icache_range(tcg_target_ulong start,

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@ -62,10 +62,6 @@
#include "elf.h" #include "elf.h"
#if defined(CONFIG_USE_GUEST_BASE) && !defined(TCG_TARGET_HAS_GUEST_BASE)
#error GUEST_BASE not supported on this host.
#endif
/* Forward declarations for functions declared in tcg-target.c and used here. */ /* Forward declarations for functions declared in tcg-target.c and used here. */
static void tcg_target_init(TCGContext *s); static void tcg_target_init(TCGContext *s);
static void tcg_target_qemu_prologue(TCGContext *s); static void tcg_target_qemu_prologue(TCGContext *s);

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@ -102,9 +102,6 @@
#define TCG_TARGET_HAS_movcond_i64 0 #define TCG_TARGET_HAS_movcond_i64 0
#endif /* TCG_TARGET_REG_BITS == 64 */ #endif /* TCG_TARGET_REG_BITS == 64 */
/* Offset to user memory in user mode. */
#define TCG_TARGET_HAS_GUEST_BASE
/* Number of registers available. /* Number of registers available.
For 32 bit hosts, we need more than 8 registers (call arguments). */ For 32 bit hosts, we need more than 8 registers (call arguments). */
/* #define TCG_TARGET_NB_REGS 8 */ /* #define TCG_TARGET_NB_REGS 8 */