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pc-bios/s390-ccw: Fix inline assembly for older versions of Clang

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Clang versions before v11.0 insist on having the %rX or %cX register
names instead of just a number. Since our Travis-CI is currently
still using Clang v6.0, we have to fix this to avoid failing jobs.

Message-Id: <20210512171550.476130-2-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Thomas Huth 2021-05-12 19:15:48 +02:00
parent 2ed765fdee
commit 052b66e721
4 changed files with 8 additions and 8 deletions
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2
pc-bios/s390-ccw/helper.h
View File

@ -31,7 +31,7 @@ static inline void *u32toptr(uint32_t n)
static inline void yield(void)
{
asm volatile ("diag 0,0,0x44"
asm volatile ("diag %%r0,%%r0,0x44"
: :
: "memory", "cc");
}

4
pc-bios/s390-ccw/jump2ipl.c
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@ -64,8 +64,8 @@ void jump_to_IPL_code(uint64_t address)
* We use the load normal reset to keep r15 unchanged. jump_to_IPL_2
* can then use r15 as its stack pointer.
*/
asm volatile("lghi 1,1\n\t"
"diag 1,1,0x308\n\t"
asm volatile("lghi %%r1,1\n\t"
"diag %%r1,%%r1,0x308\n\t"
: : : "1", "memory");
panic("\n! IPL returns !\n");
}

8
pc-bios/s390-ccw/menu.c
View File

@ -36,9 +36,9 @@ static inline void enable_clock_int(void)
uint64_t tmp = 0;
asm volatile(
"stctg 0,0,%0\n"
"stctg %%c0,%%c0,%0\n"
"oi 6+%0, 0x8\n"
"lctlg 0,0,%0"
"lctlg %%c0,%%c0,%0"
: : "Q" (tmp) : "memory"
);
}
@ -48,9 +48,9 @@ static inline void disable_clock_int(void)
uint64_t tmp = 0;
asm volatile(
"stctg 0,0,%0\n"
"stctg %%c0,%%c0,%0\n"
"ni 6+%0, 0xf7\n"
"lctlg 0,0,%0"
"lctlg %%c0,%%c0,%0"
: : "Q" (tmp) : "memory"
);
}

2
pc-bios/s390-ccw/virtio.c
View File

@ -54,7 +54,7 @@ static long kvm_hypercall(unsigned long nr, unsigned long param1,
register ulong r_param3 asm("4") = param3;
register long retval asm("2");
asm volatile ("diag 2,4,0x500"
asm volatile ("diag %%r2,%%r4,0x500"
: "=d" (retval)
: "d" (r_nr), "0" (r_param1), "r"(r_param2), "d"(r_param3)
: "memory", "cc");