spapr: Support ibm,dynamic-reconfiguration-memory
Parse ibm,architecture.vec table obtained from the guest and enable memory node configuration via ibm,dynamic-reconfiguration-memory if guest supports it. This is in preparation to support memory hotplug for sPAPR guests. This changes the way memory node configuration is done. Currently all memory nodes are built upfront. But after this patch, only memory@0 node for RMA is built upfront. Guest kernel boots with just that and rest of the memory nodes (via memory@XXX or ibm,dynamic-reconfiguration-memory) are built when guest does ibm,client-architecture-support call. Note: This patch needs a SLOF enhancement which is already part of SLOF binary in QEMU. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Bharata B Rao
David Gibson
parent
224245bf52
commit
03d196b7c5
@ -302,4 +302,52 @@ consisting of <phys>, <size> and <maxcpus>.
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pseries guests use this property to note the maximum allowed CPUs for the
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guest.
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== ibm,dynamic-reconfiguration-memory ==
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ibm,dynamic-reconfiguration-memory is a device tree node that represents
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dynamically reconfigurable logical memory blocks (LMB). This node
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is generated only when the guest advertises the support for it via
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ibm,client-architecture-support call. Memory that is not dynamically
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reconfigurable is represented by /memory nodes. The properties of this
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node that are of interest to the sPAPR memory hotplug implementation
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in QEMU are described here.
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ibm,lmb-size
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This 64bit integer defines the size of each dynamically reconfigurable LMB.
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ibm,associativity-lookup-arrays
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This property defines a lookup array in which the NUMA associativity
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information for each LMB can be found. It is a property encoded array
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that begins with an integer M, the number of associativity lists followed
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by an integer N, the number of entries per associativity list and terminated
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by M associativity lists each of length N integers.
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This property provides the same information as given by ibm,associativity
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property in a /memory node. Each assigned LMB has an index value between
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0 and M-1 which is used as an index into this table to select which
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associativity list to use for the LMB. This index value for each LMB
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is defined in ibm,dynamic-memory property.
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ibm,dynamic-memory
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This property describes the dynamically reconfigurable memory. It is a
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property encoded array that has an integer N, the number of LMBs followed
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by N LMB list entires.
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Each LMB list entry consists of the following elements:
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- Logical address of the start of the LMB encoded as a 64bit integer. This
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corresponds to reg property in /memory node.
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- DRC index of the LMB that corresponds to ibm,my-drc-index property
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in a /memory node.
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- Four bytes reserved for expansion.
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- Associativity list index for the LMB that is used as an index into
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ibm,associativity-lookup-arrays property described earlier. This
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is used to retrieve the right associativity list to be used for this
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LMB.
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- A 32bit flags word. The bit at bit position 0x00000008 defines whether
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the LMB is assigned to the the partition as of boot time.
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[1] http://thread.gmane.org/gmane.linux.ports.ppc.embedded/75350/focus=106867
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210
hw/ppc/spapr.c
210
hw/ppc/spapr.c
@ -504,44 +504,7 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
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return fdt;
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}
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int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
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target_ulong addr, target_ulong size)
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{
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void *fdt, *fdt_skel;
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sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };
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size -= sizeof(hdr);
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/* Create sceleton */
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fdt_skel = g_malloc0(size);
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_FDT((fdt_create(fdt_skel, size)));
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_FDT((fdt_begin_node(fdt_skel, "")));
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_FDT((fdt_end_node(fdt_skel)));
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_FDT((fdt_finish(fdt_skel)));
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fdt = g_malloc0(size);
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_FDT((fdt_open_into(fdt_skel, fdt, size)));
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g_free(fdt_skel);
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/* Fix skeleton up */
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_FDT((spapr_fixup_cpu_dt(fdt, spapr)));
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/* Pack resulting tree */
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_FDT((fdt_pack(fdt)));
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if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
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trace_spapr_cas_failed(size);
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return -1;
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}
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cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
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cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
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trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
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g_free(fdt);
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return 0;
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}
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static void spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
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static int spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
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hwaddr size)
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{
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uint32_t associativity[] = {
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@ -564,6 +527,7 @@ static void spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
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sizeof(mem_reg_property))));
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_FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
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sizeof(associativity))));
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return off;
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}
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static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
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@ -595,7 +559,6 @@ static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
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}
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if (!mem_start) {
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/* ppc_spapr_init() checks for rma_size <= node0_size already */
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spapr_populate_memory_node(fdt, i, 0, spapr->rma_size);
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mem_start += spapr->rma_size;
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node_size -= spapr->rma_size;
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}
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@ -745,6 +708,154 @@ static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr)
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}
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/*
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* Adds ibm,dynamic-reconfiguration-memory node.
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* Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
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* of this device tree node.
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*/
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static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fdt)
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{
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MachineState *machine = MACHINE(spapr);
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int ret, i, offset;
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uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
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uint32_t prop_lmb_size[] = {0, cpu_to_be32(lmb_size)};
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uint32_t nr_rma_lmbs = spapr->rma_size/lmb_size;
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uint32_t nr_lmbs = machine->maxram_size/lmb_size - nr_rma_lmbs;
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uint32_t nr_assigned_lmbs = machine->ram_size/lmb_size - nr_rma_lmbs;
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uint32_t *int_buf, *cur_index, buf_len;
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/* Allocate enough buffer size to fit in ibm,dynamic-memory */
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buf_len = nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE * sizeof(uint32_t) +
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sizeof(uint32_t);
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cur_index = int_buf = g_malloc0(buf_len);
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offset = fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory");
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ret = fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size,
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sizeof(prop_lmb_size));
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if (ret < 0) {
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goto out;
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}
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ret = fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff);
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if (ret < 0) {
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goto out;
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}
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ret = fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", 0x0);
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if (ret < 0) {
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goto out;
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}
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/* ibm,dynamic-memory */
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int_buf[0] = cpu_to_be32(nr_lmbs);
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cur_index++;
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for (i = 0; i < nr_lmbs; i++) {
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sPAPRDRConnector *drc;
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sPAPRDRConnectorClass *drck;
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uint64_t addr;
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uint32_t *dynamic_memory = cur_index;
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if (i < nr_assigned_lmbs) {
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addr = (i + nr_rma_lmbs) * lmb_size;
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} else {
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addr = (i - nr_assigned_lmbs) * lmb_size +
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spapr->hotplug_memory.base;
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}
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drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
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addr/lmb_size);
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g_assert(drc);
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drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
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dynamic_memory[0] = cpu_to_be32(addr >> 32);
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dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
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dynamic_memory[2] = cpu_to_be32(drck->get_index(drc));
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dynamic_memory[3] = cpu_to_be32(0); /* reserved */
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dynamic_memory[4] = cpu_to_be32(numa_get_node(addr, NULL));
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if (addr < machine->ram_size ||
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memory_region_present(get_system_memory(), addr)) {
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dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED);
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} else {
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dynamic_memory[5] = cpu_to_be32(0);
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}
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cur_index += SPAPR_DR_LMB_LIST_ENTRY_SIZE;
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}
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ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory", int_buf, buf_len);
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if (ret < 0) {
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goto out;
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}
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/* ibm,associativity-lookup-arrays */
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cur_index = int_buf;
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int_buf[0] = cpu_to_be32(nb_numa_nodes);
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int_buf[1] = cpu_to_be32(4); /* Number of entries per associativity list */
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cur_index += 2;
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for (i = 0; i < nb_numa_nodes; i++) {
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uint32_t associativity[] = {
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cpu_to_be32(0x0),
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cpu_to_be32(0x0),
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cpu_to_be32(0x0),
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cpu_to_be32(i)
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};
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memcpy(cur_index, associativity, sizeof(associativity));
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cur_index += 4;
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}
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ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf,
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(cur_index - int_buf) * sizeof(uint32_t));
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out:
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g_free(int_buf);
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return ret;
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}
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int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
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target_ulong addr, target_ulong size,
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bool cpu_update, bool memory_update)
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{
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void *fdt, *fdt_skel;
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sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
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size -= sizeof(hdr);
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/* Create sceleton */
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fdt_skel = g_malloc0(size);
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_FDT((fdt_create(fdt_skel, size)));
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_FDT((fdt_begin_node(fdt_skel, "")));
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_FDT((fdt_end_node(fdt_skel)));
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_FDT((fdt_finish(fdt_skel)));
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fdt = g_malloc0(size);
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_FDT((fdt_open_into(fdt_skel, fdt, size)));
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g_free(fdt_skel);
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/* Fixup cpu nodes */
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if (cpu_update) {
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_FDT((spapr_fixup_cpu_dt(fdt, spapr)));
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}
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/* Generate memory nodes or ibm,dynamic-reconfiguration-memory node */
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if (memory_update && smc->dr_lmb_enabled) {
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_FDT((spapr_populate_drconf_memory(spapr, fdt)));
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} else {
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_FDT((spapr_populate_memory(spapr, fdt)));
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}
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/* Pack resulting tree */
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_FDT((fdt_pack(fdt)));
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if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
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trace_spapr_cas_failed(size);
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return -1;
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}
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cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
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cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
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trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
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g_free(fdt);
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return 0;
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}
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static void spapr_finalize_fdt(sPAPRMachineState *spapr,
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hwaddr fdt_addr,
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hwaddr rtas_addr,
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@ -763,10 +874,23 @@ static void spapr_finalize_fdt(sPAPRMachineState *spapr,
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/* open out the base tree into a temp buffer for the final tweaks */
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_FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
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ret = spapr_populate_memory(spapr, fdt);
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if (ret < 0) {
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fprintf(stderr, "couldn't setup memory nodes in fdt\n");
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exit(1);
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/*
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* Add memory@0 node to represent RMA. Rest of the memory is either
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* represented by memory nodes or ibm,dynamic-reconfiguration-memory
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* node later during ibm,client-architecture-support call.
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*
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* If NUMA is configured, ensure that memory@0 ends up in the
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* first memory-less node.
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*/
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if (nb_numa_nodes) {
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for (i = 0; i < nb_numa_nodes; ++i) {
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if (numa_info[i].node_mem) {
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spapr_populate_memory_node(fdt, i, 0, spapr->rma_size);
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break;
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}
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}
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} else {
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spapr_populate_memory_node(fdt, 0, 0, spapr->rma_size);
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}
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ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
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@ -808,6 +808,32 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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return ret;
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}
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/*
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* Return the offset to the requested option vector @vector in the
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* option vector table @table.
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*/
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static target_ulong cas_get_option_vector(int vector, target_ulong table)
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{
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int i;
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char nr_vectors, nr_entries;
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if (!table) {
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return 0;
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}
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nr_vectors = (ldl_phys(&address_space_memory, table) >> 24) + 1;
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if (!vector || vector > nr_vectors) {
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return 0;
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}
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table++; /* skip nr option vectors */
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for (i = 0; i < vector - 1; i++) {
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nr_entries = ldl_phys(&address_space_memory, table) >> 24;
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table += nr_entries + 2;
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}
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return table;
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}
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typedef struct {
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PowerPCCPU *cpu;
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uint32_t cpu_version;
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@ -828,19 +854,22 @@ static void do_set_compat(void *arg)
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((cpuver) == CPU_POWERPC_LOGICAL_2_06_PLUS) ? 2061 : \
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((cpuver) == CPU_POWERPC_LOGICAL_2_07) ? 2070 : 0)
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#define OV5_DRCONF_MEMORY 0x20
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static target_ulong h_client_architecture_support(PowerPCCPU *cpu_,
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sPAPRMachineState *spapr,
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target_ulong opcode,
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target_ulong *args)
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{
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target_ulong list = args[0];
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target_ulong list = args[0], ov_table;
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PowerPCCPUClass *pcc_ = POWERPC_CPU_GET_CLASS(cpu_);
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CPUState *cs;
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bool cpu_match = false;
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bool cpu_match = false, cpu_update = true, memory_update = false;
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unsigned old_cpu_version = cpu_->cpu_version;
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unsigned compat_lvl = 0, cpu_version = 0;
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unsigned max_lvl = get_compat_level(cpu_->max_compat);
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int counter;
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char ov5_byte2;
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/* Parse PVR list */
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for (counter = 0; counter < 512; ++counter) {
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@ -890,8 +919,6 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu_,
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}
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}
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/* For the future use: here @list points to the first capability */
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/* Parsing finished */
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trace_spapr_cas_pvr(cpu_->cpu_version, cpu_match,
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cpu_version, pcc_->pcr_mask);
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@ -915,14 +942,26 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu_,
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}
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if (!cpu_version) {
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return H_SUCCESS;
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cpu_update = false;
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}
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/* For the future use: here @ov_table points to the first option vector */
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ov_table = list;
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list = cas_get_option_vector(5, ov_table);
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if (!list) {
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return H_SUCCESS;
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}
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if (spapr_h_cas_compose_response(spapr, args[1], args[2])) {
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/* @list now points to OV 5 */
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list += 2;
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ov5_byte2 = rtas_ld(list, 0) >> 24;
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if (ov5_byte2 & OV5_DRCONF_MEMORY) {
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memory_update = true;
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}
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if (spapr_h_cas_compose_response(spapr, args[1], args[2],
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cpu_update, memory_update)) {
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qemu_system_reset_request();
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}
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@ -581,7 +581,8 @@ struct sPAPREventLogEntry {
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void spapr_events_init(sPAPRMachineState *sm);
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void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq);
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int spapr_h_cas_compose_response(sPAPRMachineState *sm,
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target_ulong addr, target_ulong size);
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target_ulong addr, target_ulong size,
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bool cpu_update, bool memory_update);
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sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn,
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uint64_t bus_offset,
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uint32_t page_shift,
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@ -623,4 +624,16 @@ int spapr_rtc_import_offset(DeviceState *dev, int64_t legacy_offset);
|
||||
/* 1GB alignment for hotplug memory region */
|
||||
#define SPAPR_HOTPLUG_MEM_ALIGN (1ULL << 30)
|
||||
|
||||
/*
|
||||
* Number of 32 bit words in each LMB list entry in ibm,dynamic-memory
|
||||
* property under ibm,dynamic-reconfiguration-memory node.
|
||||
*/
|
||||
#define SPAPR_DR_LMB_LIST_ENTRY_SIZE 6
|
||||
|
||||
/*
|
||||
* This flag value defines the LMB as assigned in ibm,dynamic-memory
|
||||
* property under ibm,dynamic-reconfiguration-memory node.
|
||||
*/
|
||||
#define SPAPR_LMB_FLAGS_ASSIGNED 0x00000008
|
||||
|
||||
#endif /* !defined (__HW_SPAPR_H__) */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user