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target/ppc: remove getVSR()/putVSR() from int_helper.c

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Since commit 8a14d31b00 "target/ppc: switch fpr/vsrl registers so all VSX
registers are in host endian order" functions getVSR() and putVSR() which used
to convert the VSR registers into host endian order are no longer required.

Now that there are now no more users of getVSR()/putVSR() these functions can
be completely removed.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190616123751.781-4-mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Mark Cave-Ayland 2019-06-16 13:37:39 +01:00 committed by David Gibson
parent 001d235c7e
commit 03b32c092e
2 changed files with 10 additions and 24 deletions
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22
target/ppc/int_helper.c
View File

@ -1902,38 +1902,36 @@ VEXTRACT(d, u64)
void helper_xxextractuw(CPUPPCState *env, target_ulong xtn,
target_ulong xbn, uint32_t index)
{
ppc_vsr_t xt, xb;
ppc_vsr_t *xt = &env->vsr[xtn];
ppc_vsr_t *xb = &env->vsr[xbn];
ppc_vsr_t t = { };
size_t es = sizeof(uint32_t);
uint32_t ext_index;
int i;
getVSR(xbn, &xb, env);
memset(&xt, 0, sizeof(xt));
ext_index = index;
for (i = 0; i < es; i++, ext_index++) {
xt.VsrB(8 - es + i) = xb.VsrB(ext_index % 16);
t.VsrB(8 - es + i) = xb->VsrB(ext_index % 16);
}
putVSR(xtn, &xt, env);
*xt = t;
}
void helper_xxinsertw(CPUPPCState *env, target_ulong xtn,
target_ulong xbn, uint32_t index)
{
ppc_vsr_t xt, xb;
ppc_vsr_t *xt = &env->vsr[xtn];
ppc_vsr_t *xb = &env->vsr[xbn];
ppc_vsr_t t = *xt;
size_t es = sizeof(uint32_t);
int ins_index, i = 0;
getVSR(xbn, &xb, env);
getVSR(xtn, &xt, env);
ins_index = index;
for (i = 0; i < es && ins_index < 16; i++, ins_index++) {
xt.VsrB(ins_index) = xb.VsrB(8 - es + i);
t.VsrB(ins_index) = xb->VsrB(8 - es + i);
}
putVSR(xtn, &xt, env);
*xt = t;
}
#define VEXT_SIGNED(name, element, cast) \

12
target/ppc/internal.h
View File

@ -204,18 +204,6 @@ EXTRACT_HELPER(IMM8, 11, 8);
EXTRACT_HELPER(DCMX, 16, 7);
EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6);
static inline void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
{
vsr->VsrD(0) = env->vsr[n].VsrD(0);
vsr->VsrD(1) = env->vsr[n].VsrD(1);
}
static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
{
env->vsr[n].VsrD(0) = vsr->VsrD(0);
env->vsr[n].VsrD(1) = vsr->VsrD(1);
}
void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);