tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB
Direct branch patching was disabled when using TCG_REG_TB in commit
736a1588c1
("tcg/ppc: Fix race in goto_tb implementation").
The issue with direct branch patching with TCG_REG_TB is the lack of
synchronization between the new TCG_REG_TB being established and the
direct branch being patched in.
If each translation block is responsible for establishing its own
TCG_REG_TB then there can be no synchronization issue.
Make each translation block begin by setting up its own TCG_REG_TB.
Use the preferred 'bcl 20,31,$+4' sequence.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
[rth: Split out tcg_out_tb_start, power9 addpcis]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
096d118592
commit
03434d5202
@ -2509,9 +2509,6 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
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tcg_out32(s, MTSPR | RS(tcg_target_call_iarg_regs[1]) | CTR);
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if (USE_REG_TB) {
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, tcg_target_call_iarg_regs[1]);
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}
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tcg_out32(s, BCCTR | BO_ALWAYS);
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/* Epilogue */
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@ -2529,7 +2526,13 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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static void tcg_out_tb_start(TCGContext *s)
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{
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/* nothing to do */
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/* Load TCG_REG_TB. */
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if (USE_REG_TB) {
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/* bcl 20,31,$+4 (preferred form for getting nia) */
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tcg_out32(s, BC | BO_ALWAYS | BI(7, CR_SO) | 0x4 | LK);
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tcg_out32(s, MFSPR | RT(TCG_REG_TB) | LR);
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tcg_out32(s, ADDI | TAI(TCG_REG_TB, TCG_REG_TB, -4));
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}
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}
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static void tcg_out_exit_tb(TCGContext *s, uintptr_t arg)
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@ -2542,32 +2545,22 @@ static void tcg_out_goto_tb(TCGContext *s, int which)
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{
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uintptr_t ptr = get_jmp_target_addr(s, which);
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/* Direct branch will be patched by tb_target_set_jmp_target. */
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set_jmp_insn_offset(s, which);
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tcg_out32(s, NOP);
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/* When branch is out of range, fall through to indirect. */
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if (USE_REG_TB) {
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ptrdiff_t offset = tcg_tbrel_diff(s, (void *)ptr);
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tcg_out_mem_long(s, LD, LDX, TCG_REG_TB, TCG_REG_TB, offset);
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/* TODO: Use direct branches when possible. */
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set_jmp_insn_offset(s, which);
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tcg_out32(s, MTSPR | RS(TCG_REG_TB) | CTR);
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tcg_out32(s, BCCTR | BO_ALWAYS);
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/* For the unlinked case, need to reset TCG_REG_TB. */
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set_jmp_reset_offset(s, which);
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tcg_out_mem_long(s, ADDI, ADD, TCG_REG_TB, TCG_REG_TB,
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-tcg_current_code_size(s));
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tcg_out_mem_long(s, LD, LDX, TCG_REG_TMP1, TCG_REG_TB, offset);
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} else {
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/* Direct branch will be patched by tb_target_set_jmp_target. */
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set_jmp_insn_offset(s, which);
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tcg_out32(s, NOP);
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/* When branch is out of range, fall through to indirect. */
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP1, ptr - (int16_t)ptr);
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, (int16_t)ptr);
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tcg_out32(s, MTSPR | RS(TCG_REG_TMP1) | CTR);
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tcg_out32(s, BCCTR | BO_ALWAYS);
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set_jmp_reset_offset(s, which);
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}
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tcg_out32(s, MTSPR | RS(TCG_REG_TMP1) | CTR);
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tcg_out32(s, BCCTR | BO_ALWAYS);
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set_jmp_reset_offset(s, which);
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}
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void tb_target_set_jmp_target(const TranslationBlock *tb, int n,
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@ -2577,10 +2570,6 @@ void tb_target_set_jmp_target(const TranslationBlock *tb, int n,
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intptr_t diff = addr - jmp_rx;
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tcg_insn_unit insn;
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if (USE_REG_TB) {
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return;
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}
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if (in_range_b(diff)) {
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insn = B | (diff & 0x3fffffc);
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} else {
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@ -2600,9 +2589,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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switch (opc) {
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case INDEX_op_goto_ptr:
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tcg_out32(s, MTSPR | RS(args[0]) | CTR);
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if (USE_REG_TB) {
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, args[0]);
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}
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tcg_out32(s, ADDI | TAI(TCG_REG_R3, 0, 0));
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tcg_out32(s, BCCTR | BO_ALWAYS);
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break;
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