2015-11-12 20:54:55 +03:00
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/*
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* Device model for Zynq ADC controller
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*
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* Copyright (c) 2015 Guenter Roeck <linux@roeck-us.net>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef ZYNQ_XADC_H
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#define ZYNQ_XADC_H
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#include "hw/sysbus.h"
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2020-09-03 23:43:22 +03:00
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#include "qom/object.h"
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2015-11-12 20:54:55 +03:00
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#define ZYNQ_XADC_MMIO_SIZE 0x0020
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#define ZYNQ_XADC_NUM_IO_REGS (ZYNQ_XADC_MMIO_SIZE / 4)
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#define ZYNQ_XADC_NUM_ADC_REGS 128
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#define ZYNQ_XADC_FIFO_DEPTH 15
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#define TYPE_ZYNQ_XADC "xlnx,zynq-xadc"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(ZynqXADCState, ZYNQ_XADC)
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2015-11-12 20:54:55 +03:00
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2020-09-03 23:43:22 +03:00
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struct ZynqXADCState {
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2015-11-12 20:54:55 +03:00
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t regs[ZYNQ_XADC_NUM_IO_REGS];
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uint16_t xadc_regs[ZYNQ_XADC_NUM_ADC_REGS];
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uint16_t xadc_read_reg_previous;
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uint16_t xadc_dfifo[ZYNQ_XADC_FIFO_DEPTH];
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uint16_t xadc_dfifo_entries;
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struct IRQState *qemu_irq;
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2020-09-03 23:43:22 +03:00
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};
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2015-11-12 20:54:55 +03:00
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#endif /* ZYNQ_XADC_H */
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