2011-04-01 08:15:23 +04:00
|
|
|
/*
|
|
|
|
|
* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
|
|
|
|
|
*
|
|
|
|
|
* Hypercall based emulated RTAS
|
|
|
|
|
*
|
|
|
|
|
* Copyright (c) 2010-2011 David Gibson, IBM Corporation.
|
|
|
|
|
*
|
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
|
*
|
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
|
*
|
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
|
* THE SOFTWARE.
|
|
|
|
|
*
|
|
|
|
|
*/
|
2019-08-12 08:23:59 +03:00
|
|
|
|
2016-01-26 21:16:58 +03:00
|
|
|
#include "qemu/osdep.h"
|
2015-12-15 15:16:16 +03:00
|
|
|
#include "qemu/log.h"
|
2016-08-02 20:38:00 +03:00
|
|
|
#include "qemu/error-report.h"
|
2012-12-17 21:20:04 +04:00
|
|
|
#include "sysemu/sysemu.h"
|
|
|
|
|
#include "sysemu/device_tree.h"
|
2015-07-02 09:23:15 +03:00
|
|
|
#include "sysemu/cpus.h"
|
2018-05-01 08:43:58 +03:00
|
|
|
#include "sysemu/hw_accel.h"
|
2019-08-12 08:23:59 +03:00
|
|
|
#include "sysemu/runstate.h"
|
2018-09-04 12:24:18 +03:00
|
|
|
#include "kvm_ppc.h"
|
2011-04-01 08:15:23 +04:00
|
|
|
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/ppc/spapr.h"
|
|
|
|
|
#include "hw/ppc/spapr_vio.h"
|
2016-09-13 15:52:45 +03:00
|
|
|
#include "hw/ppc/spapr_rtas.h"
|
2018-05-01 09:22:49 +03:00
|
|
|
#include "hw/ppc/spapr_cpu_core.h"
|
2016-06-10 03:59:04 +03:00
|
|
|
#include "hw/ppc/ppc.h"
|
2011-04-01 08:15:23 +04:00
|
|
|
|
|
|
|
|
#include <libfdt.h>
|
2015-05-07 08:33:45 +03:00
|
|
|
#include "hw/ppc/spapr_drc.h"
|
2016-03-20 20:16:19 +03:00
|
|
|
#include "qemu/cutils.h"
|
2016-09-14 21:48:24 +03:00
|
|
|
#include "trace.h"
|
2016-10-20 07:55:36 +03:00
|
|
|
#include "hw/ppc/fdt.h"
|
2018-05-01 08:43:58 +03:00
|
|
|
#include "target/ppc/mmu-hash64.h"
|
2018-05-01 09:08:50 +03:00
|
|
|
#include "target/ppc/mmu-book3s-v3.h"
|
2020-01-30 21:44:22 +03:00
|
|
|
#include "migration/blocker.h"
|
2021-03-15 21:46:13 +03:00
|
|
|
#include "helper_regs.h"
|
2015-05-07 08:33:45 +03:00
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2011-04-01 08:15:24 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
uint8_t c = rtas_ld(args, 0);
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
SpaprVioDevice *sdev = vty_lookup(spapr, 0);
|
2011-04-01 08:15:24 +04:00
|
|
|
|
|
|
|
|
if (!sdev) {
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
|
2011-04-01 08:15:24 +04:00
|
|
|
} else {
|
|
|
|
|
vty_putchars(sdev, &c, sizeof(c));
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
2011-04-01 08:15:24 +04:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2011-04-01 08:15:24 +04:00
|
|
|
uint32_t token, uint32_t nargs, target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
if (nargs != 2 || nret != 1) {
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
2011-04-01 08:15:24 +04:00
|
|
|
return;
|
|
|
|
|
}
|
2017-05-16 00:41:13 +03:00
|
|
|
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
|
2016-02-17 21:23:19 +03:00
|
|
|
cpu_stop_current();
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
2011-04-01 08:15:24 +04:00
|
|
|
}
|
|
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2012-03-29 01:39:47 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
if (nargs != 0 || nret != 1) {
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
2012-03-29 01:39:47 +04:00
|
|
|
return;
|
|
|
|
|
}
|
2017-05-16 00:41:13 +03:00
|
|
|
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
2012-03-29 01:39:47 +04:00
|
|
|
}
|
|
|
|
|
|
2013-06-20 00:40:30 +04:00
|
|
|
static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
SpaprMachineState *spapr,
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
target_ulong id;
|
2014-02-01 18:45:52 +04:00
|
|
|
PowerPCCPU *cpu;
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
|
|
|
|
|
if (nargs != 1 || nret != 2) {
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
id = rtas_ld(args, 0);
|
2017-08-09 08:38:56 +03:00
|
|
|
cpu = spapr_find_cpu(id);
|
2013-05-29 23:03:31 +04:00
|
|
|
if (cpu != NULL) {
|
2014-02-01 18:45:52 +04:00
|
|
|
if (CPU(cpu)->halted) {
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
rtas_st(rets, 1, 0);
|
|
|
|
|
} else {
|
|
|
|
|
rtas_st(rets, 1, 2);
|
|
|
|
|
}
|
|
|
|
|
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Didn't find a matching cpu */
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
}
|
|
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
target_ulong id, start, r3;
|
2018-05-01 08:43:58 +03:00
|
|
|
PowerPCCPU *newcpu;
|
|
|
|
|
CPUPPCState *env;
|
|
|
|
|
PowerPCCPUClass *pcc;
|
2018-05-01 09:05:09 +03:00
|
|
|
target_ulong lpcr;
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
|
|
|
|
|
if (nargs != 3 || nret != 1) {
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
id = rtas_ld(args, 0);
|
|
|
|
|
start = rtas_ld(args, 1);
|
|
|
|
|
r3 = rtas_ld(args, 2);
|
|
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
newcpu = spapr_find_cpu(id);
|
|
|
|
|
if (!newcpu) {
|
|
|
|
|
/* Didn't find a matching cpu */
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
|
|
|
|
return;
|
|
|
|
|
}
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
env = &newcpu->env;
|
|
|
|
|
pcc = POWERPC_CPU_GET_CLASS(newcpu);
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
if (!CPU(newcpu)->halted) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
|
|
|
|
|
return;
|
|
|
|
|
}
|
2012-09-12 20:57:10 +04:00
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
cpu_synchronize_state(CPU(newcpu));
|
2017-11-24 10:05:48 +03:00
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
|
2021-03-15 21:46:13 +03:00
|
|
|
hreg_compute_hflags(env);
|
2018-05-01 09:05:09 +03:00
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
/* Enable Power-saving mode Exit Cause exceptions for the new CPU */
|
2018-04-05 09:27:18 +03:00
|
|
|
lpcr = env->spr[SPR_LPCR];
|
2018-05-01 09:05:09 +03:00
|
|
|
if (!pcc->interrupts_big_endian(callcpu)) {
|
|
|
|
|
lpcr |= LPCR_ILE;
|
|
|
|
|
}
|
2018-05-01 09:08:50 +03:00
|
|
|
if (env->mmu_model == POWERPC_MMU_3_00) {
|
|
|
|
|
/*
|
|
|
|
|
* New cpus are expected to start in the same radix/hash mode
|
|
|
|
|
* as the existing CPUs
|
|
|
|
|
*/
|
2019-02-15 20:00:18 +03:00
|
|
|
if (ppc64_v3_radix(callcpu)) {
|
|
|
|
|
lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
|
2018-05-01 09:08:50 +03:00
|
|
|
} else {
|
2019-02-15 20:00:18 +03:00
|
|
|
lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR);
|
2018-05-01 09:08:50 +03:00
|
|
|
}
|
2019-05-16 03:57:44 +03:00
|
|
|
env->spr[SPR_PSSCR] &= ~PSSCR_EC;
|
2018-05-01 09:08:50 +03:00
|
|
|
}
|
2018-05-01 09:05:09 +03:00
|
|
|
ppc_store_lpcr(newcpu, lpcr);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Set the timebase offset of the new CPU to that of the invoking
|
|
|
|
|
* CPU. This helps hotplugged CPU to have the correct timebase
|
|
|
|
|
* offset.
|
|
|
|
|
*/
|
|
|
|
|
newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
|
2017-11-24 10:05:48 +03:00
|
|
|
|
2020-03-10 08:07:31 +03:00
|
|
|
spapr_cpu_set_entry_state(newcpu, start, 0, r3, 0);
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
qemu_cpu_kick(CPU(newcpu));
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
|
2018-05-01 08:43:58 +03:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
}
|
|
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2013-08-30 10:11:56 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
CPUState *cs = CPU(cpu);
|
|
|
|
|
CPUPPCState *env = &cpu->env;
|
2017-11-24 10:05:48 +03:00
|
|
|
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
|
2013-08-30 10:11:56 +04:00
|
|
|
|
2017-11-24 10:05:48 +03:00
|
|
|
/* Disable Power-saving mode Exit Cause exceptions for the CPU.
|
|
|
|
|
* This could deliver an interrupt on a dying CPU and crash the
|
2019-05-16 03:57:44 +03:00
|
|
|
* guest.
|
|
|
|
|
* For the same reason, set PSSCR_EC.
|
|
|
|
|
*/
|
2018-05-01 08:43:58 +03:00
|
|
|
ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
|
2019-05-16 03:57:44 +03:00
|
|
|
env->spr[SPR_PSSCR] |= PSSCR_EC;
|
2018-05-01 08:43:58 +03:00
|
|
|
cs->halted = 1;
|
2018-09-04 12:24:18 +03:00
|
|
|
kvmppc_set_reg_ppc_online(cpu, 0);
|
2018-05-01 08:43:58 +03:00
|
|
|
qemu_cpu_kick(cs);
|
2013-08-30 10:11:56 +04:00
|
|
|
}
|
|
|
|
|
|
2019-07-22 09:17:52 +03:00
|
|
|
static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2021-01-14 21:06:25 +03:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
2019-07-22 09:17:52 +03:00
|
|
|
{
|
|
|
|
|
CPUState *cs;
|
|
|
|
|
|
|
|
|
|
if (nargs != 0 || nret != 1) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
CPU_FOREACH(cs) {
|
|
|
|
|
PowerPCCPU *c = POWERPC_CPU(cs);
|
|
|
|
|
CPUPPCState *e = &c->env;
|
|
|
|
|
if (c == cpu) {
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* See h_join */
|
|
|
|
|
if (!cs->halted || (e->msr & (1ULL << MSR_EE))) {
|
|
|
|
|
rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
qemu_system_suspend_request();
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
|
|
|
|
}
|
|
|
|
|
|
2016-01-19 07:57:42 +03:00
|
|
|
static inline int sysparm_st(target_ulong addr, target_ulong len,
|
|
|
|
|
const void *val, uint16_t vallen)
|
|
|
|
|
{
|
|
|
|
|
hwaddr phys = ppc64_phys_to_real(addr);
|
|
|
|
|
|
|
|
|
|
if (len < 2) {
|
|
|
|
|
return RTAS_OUT_SYSPARM_PARAM_ERROR;
|
|
|
|
|
}
|
|
|
|
|
stw_be_phys(&address_space_memory, phys, vallen);
|
|
|
|
|
cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
|
|
|
|
|
return RTAS_OUT_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
2013-11-19 08:28:55 +04:00
|
|
|
static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
SpaprMachineState *spapr,
|
2013-11-19 08:28:55 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
2019-08-27 07:57:51 +03:00
|
|
|
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
|
2020-01-21 14:03:41 +03:00
|
|
|
MachineState *ms = MACHINE(spapr);
|
2013-11-19 08:28:55 +04:00
|
|
|
target_ulong parameter = rtas_ld(args, 0);
|
|
|
|
|
target_ulong buffer = rtas_ld(args, 1);
|
|
|
|
|
target_ulong length = rtas_ld(args, 2);
|
2016-01-19 07:57:42 +03:00
|
|
|
target_ulong ret;
|
2013-11-19 08:28:55 +04:00
|
|
|
|
|
|
|
|
switch (parameter) {
|
2014-06-25 07:54:32 +04:00
|
|
|
case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
|
2015-09-01 04:24:37 +03:00
|
|
|
char *param_val = g_strdup_printf("MaxEntCap=%d,"
|
2018-06-25 15:42:24 +03:00
|
|
|
"DesMem=%" PRIu64 ","
|
2015-09-01 04:24:37 +03:00
|
|
|
"DesProcs=%d,"
|
|
|
|
|
"MaxPlatProcs=%d",
|
2020-01-21 14:03:42 +03:00
|
|
|
ms->smp.max_cpus,
|
2020-01-21 14:03:40 +03:00
|
|
|
ms->ram_size / MiB,
|
2019-05-18 23:54:22 +03:00
|
|
|
ms->smp.cpus,
|
2020-01-21 14:03:42 +03:00
|
|
|
ms->smp.max_cpus);
|
2019-08-27 07:57:51 +03:00
|
|
|
if (pcc->n_host_threads > 0) {
|
|
|
|
|
char *hostthr_val, *old = param_val;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Add HostThrs property. This property is not present in PAPR but
|
|
|
|
|
* is expected by some guests to communicate the number of physical
|
|
|
|
|
* host threads per core on the system so that they can scale
|
|
|
|
|
* information which varies based on the thread configuration.
|
|
|
|
|
*/
|
|
|
|
|
hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads);
|
|
|
|
|
param_val = g_strconcat(param_val, hostthr_val, NULL);
|
|
|
|
|
g_free(hostthr_val);
|
|
|
|
|
g_free(old);
|
|
|
|
|
}
|
2016-01-19 07:57:42 +03:00
|
|
|
ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
|
2014-06-25 07:54:32 +04:00
|
|
|
g_free(param_val);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2014-06-25 07:54:30 +04:00
|
|
|
case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
|
|
|
|
|
uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
|
|
|
|
|
|
2016-01-19 07:57:42 +03:00
|
|
|
ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val));
|
2013-11-19 08:28:55 +04:00
|
|
|
break;
|
|
|
|
|
}
|
2014-06-25 07:54:31 +04:00
|
|
|
case RTAS_SYSPARM_UUID:
|
2016-09-21 07:27:22 +03:00
|
|
|
ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
|
|
|
|
|
(qemu_uuid_set ? 16 : 0));
|
2014-06-25 07:54:31 +04:00
|
|
|
break;
|
2014-06-25 07:54:30 +04:00
|
|
|
default:
|
|
|
|
|
ret = RTAS_OUT_NOT_SUPPORTED;
|
|
|
|
|
}
|
2013-11-19 08:28:55 +04:00
|
|
|
|
|
|
|
|
rtas_st(rets, 0, ret);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
SpaprMachineState *spapr,
|
2013-11-19 08:28:55 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
target_ulong parameter = rtas_ld(args, 0);
|
|
|
|
|
target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
|
|
|
|
|
|
|
|
|
|
switch (parameter) {
|
2014-06-25 07:54:32 +04:00
|
|
|
case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
|
2014-06-25 07:54:30 +04:00
|
|
|
case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
|
2014-06-25 07:54:31 +04:00
|
|
|
case RTAS_SYSPARM_UUID:
|
2013-11-19 08:28:55 +04:00
|
|
|
ret = RTAS_OUT_NOT_AUTHORIZED;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
rtas_st(rets, 0, ret);
|
|
|
|
|
}
|
|
|
|
|
|
2014-06-30 12:35:29 +04:00
|
|
|
static void rtas_ibm_os_term(PowerPCCPU *cpu,
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
SpaprMachineState *spapr,
|
2014-06-30 12:35:29 +04:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
2020-02-03 06:20:44 +03:00
|
|
|
target_ulong msgaddr = rtas_ld(args, 0);
|
|
|
|
|
char msg[512];
|
|
|
|
|
|
|
|
|
|
cpu_physical_memory_read(msgaddr, msg, sizeof(msg) - 1);
|
|
|
|
|
msg[sizeof(msg) - 1] = 0;
|
|
|
|
|
|
|
|
|
|
error_report("OS terminated: %s", msg);
|
2017-06-07 10:06:44 +03:00
|
|
|
qemu_system_guest_panicked(NULL);
|
2014-06-30 12:35:29 +04:00
|
|
|
|
2017-06-07 10:06:44 +03:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
2014-06-30 12:35:29 +04:00
|
|
|
}
|
|
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2015-05-07 08:33:44 +03:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args, uint32_t nret,
|
|
|
|
|
target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
int32_t power_domain;
|
|
|
|
|
|
|
|
|
|
if (nargs != 2 || nret != 2) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* we currently only use a single, "live insert" powerdomain for
|
|
|
|
|
* hotplugged/dlpar'd resources, so the power is always live/full (100)
|
|
|
|
|
*/
|
|
|
|
|
power_domain = rtas_ld(args, 0);
|
|
|
|
|
if (power_domain != -1) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
|
|
|
|
rtas_st(rets, 1, 100);
|
|
|
|
|
}
|
|
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2015-05-07 08:33:44 +03:00
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args, uint32_t nret,
|
|
|
|
|
target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
int32_t power_domain;
|
|
|
|
|
|
|
|
|
|
if (nargs != 1 || nret != 2) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* we currently only use a single, "live insert" powerdomain for
|
|
|
|
|
* hotplugged/dlpar'd resources, so the power is always live/full (100)
|
|
|
|
|
*/
|
|
|
|
|
power_domain = rtas_ld(args, 0);
|
|
|
|
|
if (power_domain != -1) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
|
|
|
|
rtas_st(rets, 1, 100);
|
|
|
|
|
}
|
|
|
|
|
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
|
|
|
|
|
SpaprMachineState *spapr,
|
|
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
|
|
|
|
hwaddr rtas_addr;
|
2020-03-16 17:26:08 +03:00
|
|
|
target_ulong sreset_addr, mce_addr;
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
|
2020-03-16 17:26:07 +03:00
|
|
|
if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
rtas_addr = spapr_get_rtas_addr();
|
|
|
|
|
if (!rtas_addr) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2020-03-16 17:26:08 +03:00
|
|
|
sreset_addr = rtas_ld(args, 0);
|
|
|
|
|
mce_addr = rtas_ld(args, 1);
|
|
|
|
|
|
|
|
|
|
/* PAPR requires these are in the first 32M of memory and within RMA */
|
|
|
|
|
if (sreset_addr >= 32 * MiB || sreset_addr >= spapr->rma_size ||
|
|
|
|
|
mce_addr >= 32 * MiB || mce_addr >= spapr->rma_size) {
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2020-03-25 17:29:03 +03:00
|
|
|
if (kvm_enabled()) {
|
2020-07-24 11:35:33 +03:00
|
|
|
if (kvmppc_set_fwnmi(cpu) < 0) {
|
2020-03-25 17:29:03 +03:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-03-16 17:26:08 +03:00
|
|
|
spapr->fwnmi_system_reset_addr = sreset_addr;
|
|
|
|
|
spapr->fwnmi_machine_check_addr = mce_addr;
|
2020-03-16 17:26:07 +03:00
|
|
|
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
|
|
|
|
|
SpaprMachineState *spapr,
|
|
|
|
|
uint32_t token, uint32_t nargs,
|
|
|
|
|
target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
2020-03-16 17:26:07 +03:00
|
|
|
if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2020-03-16 17:26:07 +03:00
|
|
|
if (spapr->fwnmi_machine_check_addr == -1) {
|
2020-03-25 17:29:05 +03:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
|
"FWNMI: ibm,nmi-interlock RTAS called with FWNMI not registered.\n");
|
|
|
|
|
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
/* NMI register not called */
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2020-03-16 17:26:07 +03:00
|
|
|
if (spapr->fwnmi_machine_check_interlock != cpu->vcpu_id) {
|
2020-03-16 17:26:13 +03:00
|
|
|
/*
|
|
|
|
|
* The vCPU that hit the NMI should invoke "ibm,nmi-interlock"
|
|
|
|
|
* This should be PARAM_ERROR, but Linux calls "ibm,nmi-interlock"
|
|
|
|
|
* for system reset interrupts, despite them not being interlocked.
|
|
|
|
|
* PowerVM silently ignores this and returns success here. Returning
|
|
|
|
|
* failure causes Linux to print the error "FWNMI: nmi-interlock
|
|
|
|
|
* failed: -3", although no other apparent ill effects, this is a
|
|
|
|
|
* regression for the user when enabling FWNMI. So for now, match
|
|
|
|
|
* PowerVM. When most Linux clients are fixed, this could be
|
|
|
|
|
* changed.
|
|
|
|
|
*/
|
|
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* vCPU issuing "ibm,nmi-interlock" is done with NMI handling,
|
2020-03-16 17:26:07 +03:00
|
|
|
* hence unset fwnmi_machine_check_interlock.
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
*/
|
2020-03-16 17:26:07 +03:00
|
|
|
spapr->fwnmi_machine_check_interlock = -1;
|
|
|
|
|
qemu_cond_signal(&spapr->fwnmi_machine_check_interlock_cond);
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
|
2020-01-30 21:44:22 +03:00
|
|
|
migrate_del_blocker(spapr->fwnmi_migration_blocker);
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
}
|
|
|
|
|
|
2011-04-01 08:15:23 +04:00
|
|
|
static struct rtas_call {
|
|
|
|
|
const char *name;
|
|
|
|
|
spapr_rtas_fn fn;
|
2014-06-23 17:26:32 +04:00
|
|
|
} rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
|
2011-04-01 08:15:23 +04:00
|
|
|
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
2011-04-01 08:15:23 +04:00
|
|
|
uint32_t token, uint32_t nargs, target_ulong args,
|
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
|
{
|
2014-06-23 17:26:32 +04:00
|
|
|
if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
|
|
|
|
|
struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
|
2011-04-01 08:15:23 +04:00
|
|
|
|
|
|
|
|
if (call->fn) {
|
2013-06-20 00:40:30 +04:00
|
|
|
call->fn(cpu, spapr, token, nargs, args, nret, rets);
|
2011-04-01 08:15:23 +04:00
|
|
|
return H_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2011-04-01 08:15:24 +04:00
|
|
|
/* HACK: Some Linux early debug code uses RTAS display-character,
|
|
|
|
|
* but assumes the token value is 0xa (which it is on some real
|
|
|
|
|
* machines) without looking it up in the device tree. This
|
|
|
|
|
* special case makes this work */
|
|
|
|
|
if (token == 0xa) {
|
2013-06-20 00:40:30 +04:00
|
|
|
rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
|
2011-04-01 08:15:24 +04:00
|
|
|
return H_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
2011-04-01 08:15:23 +04:00
|
|
|
hcall_dprintf("Unknown RTAS token 0x%x\n", token);
|
2013-11-19 08:28:54 +04:00
|
|
|
rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
|
2011-04-01 08:15:23 +04:00
|
|
|
return H_PARAMETER;
|
|
|
|
|
}
|
|
|
|
|
|
2016-09-13 15:52:45 +03:00
|
|
|
uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
|
|
|
|
|
uint32_t nret, uint64_t rets)
|
|
|
|
|
{
|
|
|
|
|
int token;
|
|
|
|
|
|
|
|
|
|
for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
|
|
|
|
|
if (strcmp(cmd, rtas_table[token].name) == 0) {
|
spapr: Use CamelCase properly
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-06 07:35:37 +03:00
|
|
|
SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
|
2016-09-13 15:52:45 +03:00
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
|
|
|
|
|
|
|
|
|
|
rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
|
|
|
|
|
nargs, args, nret, rets);
|
|
|
|
|
return H_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return H_PARAMETER;
|
|
|
|
|
}
|
|
|
|
|
|
2014-06-23 17:26:32 +04:00
|
|
|
void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
|
2011-04-01 08:15:23 +04:00
|
|
|
{
|
2016-01-20 04:58:44 +03:00
|
|
|
assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
|
2012-10-08 22:17:36 +04:00
|
|
|
|
2014-06-23 17:26:32 +04:00
|
|
|
token -= RTAS_TOKEN_BASE;
|
2016-01-20 04:58:44 +03:00
|
|
|
|
2019-03-21 17:49:07 +03:00
|
|
|
assert(!name || !rtas_table[token].name);
|
2011-04-01 08:15:23 +04:00
|
|
|
|
2014-06-23 17:26:32 +04:00
|
|
|
rtas_table[token].name = name;
|
|
|
|
|
rtas_table[token].fn = fn;
|
2011-04-01 08:15:23 +04:00
|
|
|
}
|
|
|
|
|
|
2016-10-20 07:55:36 +03:00
|
|
|
void spapr_dt_rtas_tokens(void *fdt, int rtas)
|
2011-04-01 08:15:23 +04:00
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
2014-06-23 17:26:32 +04:00
|
|
|
for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
|
2011-04-01 08:15:23 +04:00
|
|
|
struct rtas_call *call = &rtas_table[i];
|
|
|
|
|
|
2012-11-12 20:46:53 +04:00
|
|
|
if (!call->name) {
|
2011-04-01 08:15:23 +04:00
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
2016-10-20 07:55:36 +03:00
|
|
|
_FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
|
2011-04-01 08:15:23 +04:00
|
|
|
}
|
|
|
|
|
}
|
2011-04-01 08:15:24 +04:00
|
|
|
|
2020-01-30 21:44:20 +03:00
|
|
|
hwaddr spapr_get_rtas_addr(void)
|
|
|
|
|
{
|
|
|
|
|
SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
|
|
|
|
|
int rtas_node;
|
|
|
|
|
const fdt32_t *rtas_data;
|
|
|
|
|
void *fdt = spapr->fdt_blob;
|
|
|
|
|
|
|
|
|
|
/* fetch rtas addr from fdt */
|
|
|
|
|
rtas_node = fdt_path_offset(fdt, "/rtas");
|
|
|
|
|
if (rtas_node < 0) {
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL);
|
|
|
|
|
if (!rtas_data) {
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We assume that the OS called RTAS instantiate-rtas, but some other
|
|
|
|
|
* OS might call RTAS instantiate-rtas-64 instead. This fine as of now
|
|
|
|
|
* as SLOF only supports 32-bit variant.
|
|
|
|
|
*/
|
|
|
|
|
return (hwaddr)fdt32_to_cpu(*rtas_data);
|
|
|
|
|
}
|
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
static void core_rtas_register_types(void)
|
2011-04-01 08:15:24 +04:00
|
|
|
{
|
2014-06-23 17:26:32 +04:00
|
|
|
spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
|
|
|
|
|
rtas_display_character);
|
|
|
|
|
spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
|
|
|
|
|
spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
|
|
|
|
|
rtas_system_reboot);
|
|
|
|
|
spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
rtas_query_cpu_stopped_state);
|
2014-06-23 17:26:32 +04:00
|
|
|
spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
|
|
|
|
|
spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
|
2019-07-22 09:17:52 +03:00
|
|
|
spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me",
|
|
|
|
|
rtas_ibm_suspend_me);
|
2014-06-23 17:26:32 +04:00
|
|
|
spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
|
|
|
|
|
"ibm,get-system-parameter",
|
2013-11-19 08:28:55 +04:00
|
|
|
rtas_ibm_get_system_parameter);
|
2014-06-23 17:26:32 +04:00
|
|
|
spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
|
|
|
|
|
"ibm,set-system-parameter",
|
2013-11-19 08:28:55 +04:00
|
|
|
rtas_ibm_set_system_parameter);
|
2014-06-30 12:35:29 +04:00
|
|
|
spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
|
|
|
|
|
rtas_ibm_os_term);
|
2015-05-07 08:33:44 +03:00
|
|
|
spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
|
|
|
|
|
rtas_set_power_level);
|
|
|
|
|
spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
|
|
|
|
|
rtas_get_power_level);
|
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor that also received a machine check error waits
till the first processor is done reading the error log.
The first processor issues "ibm,nmi-interlock" call
when the error log is consumed.
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
[Register fwnmi RTAS calls in core_rtas_register_types()
where other RTAS calls are registered]
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Message-Id: <20200130184423.20519-6-ganeshgr@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-01-30 21:44:21 +03:00
|
|
|
spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
|
|
|
|
|
rtas_ibm_nmi_register);
|
|
|
|
|
spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
|
|
|
|
|
rtas_ibm_nmi_interlock);
|
2011-04-01 08:15:24 +04:00
|
|
|
}
|
2012-02-09 18:20:55 +04:00
|
|
|
|
|
|
|
|
type_init(core_rtas_register_types)
|