2012-04-15 02:35:50 +04:00
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/*
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* QEMU Motorola 68k CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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2016-01-26 21:17:23 +03:00
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#include "qemu/osdep.h"
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include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 11:01:28 +03:00
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#include "qapi/error.h"
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2012-04-15 02:35:50 +04:00
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#include "cpu.h"
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2013-01-20 22:53:28 +04:00
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#include "migration/vmstate.h"
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2018-01-19 21:24:22 +03:00
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#include "fpu/softfloat.h"
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2012-04-15 02:35:50 +04:00
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2013-06-28 22:35:01 +04:00
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static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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cpu->env.pc = value;
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}
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2013-08-25 20:53:55 +04:00
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static bool m68k_cpu_has_work(CPUState *cs)
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{
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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2012-04-15 05:30:10 +04:00
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static void m68k_set_feature(CPUM68KState *env, int feature)
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{
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env->features |= (1u << feature);
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}
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2021-02-01 03:01:52 +03:00
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static void m68k_unset_feature(CPUM68KState *env, int feature)
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{
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env->features &= (-1u - (1u << feature));
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}
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cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 13:05:11 +03:00
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static void m68k_cpu_reset(DeviceState *dev)
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2012-04-15 02:35:50 +04:00
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{
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 13:05:11 +03:00
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CPUState *s = CPU(dev);
|
2012-04-15 02:35:50 +04:00
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M68kCPU *cpu = M68K_CPU(s);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
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CPUM68KState *env = &cpu->env;
|
2017-06-20 23:51:18 +03:00
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|
floatx80 nan = floatx80_default_nan(NULL);
|
2017-06-20 23:51:17 +03:00
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|
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int i;
|
2012-04-15 02:35:50 +04:00
|
|
|
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 13:05:11 +03:00
|
|
|
mcc->parent_reset(dev);
|
2012-04-15 02:35:50 +04:00
|
|
|
|
2016-11-14 17:19:17 +03:00
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|
|
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
|
2018-01-04 04:29:12 +03:00
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#ifdef CONFIG_SOFTMMU
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cpu_m68k_set_sr(env, SR_S | SR_I);
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#else
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cpu_m68k_set_sr(env, 0);
|
2012-04-15 02:59:50 +04:00
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#endif
|
2017-06-20 23:51:17 +03:00
|
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for (i = 0; i < 8; i++) {
|
2017-06-20 23:51:18 +03:00
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env->fregs[i].d = nan;
|
2017-06-20 23:51:17 +03:00
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}
|
2017-06-20 23:51:20 +03:00
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cpu_m68k_set_fpcr(env, 0);
|
2017-06-20 23:51:17 +03:00
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env->fpsr = 0;
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|
2012-04-15 02:59:50 +04:00
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/* TODO: We should set PC from the interrupt vector. */
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env->pc = 0;
|
2012-04-15 02:35:50 +04:00
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}
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|
2011-09-17 23:21:07 +04:00
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static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
|
2015-07-12 05:00:00 +03:00
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{
|
2011-09-17 23:21:07 +04:00
|
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M68kCPU *cpu = M68K_CPU(s);
|
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CPUM68KState *env = &cpu->env;
|
2015-07-12 05:00:00 +03:00
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|
info->print_insn = print_insn_m68k;
|
2011-09-17 23:21:07 +04:00
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if (m68k_feature(env, M68K_FEATURE_M68000)) {
|
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info->mach = bfd_mach_m68040;
|
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}
|
2015-07-12 05:00:00 +03:00
|
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|
}
|
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|
2012-04-15 05:30:10 +04:00
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/* CPU models */
|
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2013-01-21 20:50:15 +04:00
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static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
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{
|
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ObjectClass *oc;
|
2013-01-27 23:16:17 +04:00
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char *typename;
|
2013-01-21 20:50:15 +04:00
|
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|
2017-10-05 16:50:45 +03:00
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typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
|
2013-01-27 23:16:17 +04:00
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oc = object_class_by_name(typename);
|
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g_free(typename);
|
2013-01-23 15:36:31 +04:00
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if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
|
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object_class_is_abstract(oc))) {
|
2013-01-21 20:50:15 +04:00
|
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return NULL;
|
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|
|
}
|
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|
return oc;
|
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}
|
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|
2012-04-15 05:30:10 +04:00
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static void m5206_cpu_initfn(Object *obj)
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|
{
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M68kCPU *cpu = M68K_CPU(obj);
|
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CPUM68KState *env = &cpu->env;
|
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|
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
|
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}
|
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|
2021-02-01 03:01:52 +03:00
|
|
|
/* Base feature set, including isns. for m68k family */
|
2015-06-23 21:55:08 +03:00
|
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static void m68000_cpu_initfn(Object *obj)
|
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|
{
|
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|
|
M68kCPU *cpu = M68K_CPU(obj);
|
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|
CPUM68KState *env = &cpu->env;
|
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|
|
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m68k_set_feature(env, M68K_FEATURE_M68000);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_USP);
|
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|
|
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
|
2018-02-06 15:44:31 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_MOVEP);
|
2015-06-23 21:55:08 +03:00
|
|
|
}
|
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
/*
|
|
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|
* Adds BKPT, MOVE-from-SR *now priv instr, and MOVEC, MOVES, RTD
|
|
|
|
*/
|
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|
|
static void m68010_cpu_initfn(Object *obj)
|
2015-06-23 21:55:08 +03:00
|
|
|
{
|
2021-02-01 03:01:52 +03:00
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
|
|
|
m68000_cpu_initfn(obj);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_M68010);
|
2017-06-05 13:00:14 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_RTD);
|
2021-02-01 03:01:52 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_BKPT);
|
2021-02-01 03:01:52 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_MOVEC);
|
2015-06-23 21:55:08 +03:00
|
|
|
}
|
2019-12-20 20:24:15 +03:00
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
/*
|
|
|
|
* Adds BFCHG, BFCLR, BFEXTS, BFEXTU, BFFFO, BFINS, BFSET, BFTST, CAS, CAS2,
|
|
|
|
* CHK2, CMP2, DIVSL, DIVUL, EXTB, PACK, TRAPcc, UNPK.
|
|
|
|
*
|
|
|
|
* 68020/30 only:
|
|
|
|
* CALLM, cpBcc, cpDBcc, cpGEN, cpRESTORE, cpSAVE, cpScc, cpTRAPcc
|
|
|
|
*/
|
2019-12-20 20:24:15 +03:00
|
|
|
static void m68020_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
m68010_cpu_initfn(obj);
|
|
|
|
m68k_unset_feature(env, M68K_FEATURE_M68010);
|
2019-12-20 20:24:15 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_M68020);
|
2021-02-01 03:01:52 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_BRAL);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_BCCL);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_BITFIELD);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_FPU);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CAS);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CHK2);
|
2021-02-01 03:01:52 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_MSP);
|
2021-03-08 15:11:55 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_UNALIGNED_DATA);
|
2019-12-20 20:24:15 +03:00
|
|
|
}
|
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
/*
|
|
|
|
* Adds: PFLUSH (*5)
|
|
|
|
* 68030 Only: PFLUSHA (*5), PLOAD (*5), PMOVE
|
|
|
|
* 68030/40 Only: PTEST
|
|
|
|
*
|
|
|
|
* NOTES:
|
|
|
|
* 5. Not valid on MC68EC030
|
|
|
|
*/
|
2019-12-20 20:24:15 +03:00
|
|
|
static void m68030_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
m68020_cpu_initfn(obj);
|
|
|
|
m68k_unset_feature(env, M68K_FEATURE_M68020);
|
2019-12-20 20:24:15 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_M68030);
|
|
|
|
}
|
2018-01-04 04:29:04 +03:00
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
/*
|
|
|
|
* Adds: CINV, CPUSH
|
|
|
|
* Adds all with Note *2: FABS, FSABS, FDABS, FADD, FSADD, FDADD, FBcc, FCMP,
|
|
|
|
* FDBcc, FDIV, FSDIV, FDDIV, FMOVE, FSMOVE, FDMOVE,
|
|
|
|
* FMOVEM, FMUL, FSMUL, FDMUL, FNEG, FSNEG, FDNEG, FNOP,
|
|
|
|
* FRESTORE, FSAVE, FScc, FSQRT, FSSQRT, FDSQRT, FSUB,
|
|
|
|
* FSSUB, FDSUB, FTRAPcc, FTST
|
|
|
|
*
|
|
|
|
* Adds with Notes *2, and *3: FACOS, FASIN, FATAN, FATANH, FCOS, FCOSH, FETOX,
|
|
|
|
* FETOXM, FGETEXP, FGETMAN, FINT, FINTRZ, FLOG10,
|
|
|
|
* FLOG2, FLOGN, FLOGNP1, FMOD, FMOVECR, FREM,
|
|
|
|
* FSCALE, FSGLDIV, FSGLMUL, FSIN, FSINCOS, FSINH,
|
|
|
|
* FTAN, FTANH, FTENTOX, FTWOTOX
|
|
|
|
* NOTES:
|
|
|
|
* 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
|
|
|
|
* 3. These are software-supported instructions on the MC68040 and MC68060.
|
|
|
|
*/
|
2018-01-04 04:29:04 +03:00
|
|
|
static void m68040_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
m68030_cpu_initfn(obj);
|
|
|
|
m68k_unset_feature(env, M68K_FEATURE_M68030);
|
2018-01-04 04:29:04 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_M68040);
|
|
|
|
}
|
2015-06-23 21:55:08 +03:00
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
/*
|
|
|
|
* Adds: PLPA
|
|
|
|
* Adds all with Note *2: CAS, CAS2, MULS, MULU, CHK2, CMP2, DIVS, DIVU
|
|
|
|
* All Fxxxx instructions are as per m68040 with exception to; FMOVEM NOTE3
|
|
|
|
*
|
|
|
|
* Does NOT implement MOVEP
|
|
|
|
*
|
|
|
|
* NOTES:
|
|
|
|
* 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
|
|
|
|
* 3. These are software-supported instructions on the MC68040 and MC68060.
|
|
|
|
*/
|
2015-06-23 21:55:08 +03:00
|
|
|
static void m68060_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
2021-02-01 03:01:52 +03:00
|
|
|
m68040_cpu_initfn(obj);
|
|
|
|
m68k_unset_feature(env, M68K_FEATURE_M68040);
|
2019-12-20 20:24:15 +03:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_M68060);
|
2021-02-01 03:01:52 +03:00
|
|
|
m68k_unset_feature(env, M68K_FEATURE_MOVEP);
|
|
|
|
|
|
|
|
/* Implemented as a software feature */
|
|
|
|
m68k_unset_feature(env, M68K_FEATURE_QUAD_MULDIV);
|
2015-06-23 21:55:08 +03:00
|
|
|
}
|
|
|
|
|
2012-04-15 05:30:10 +04:00
|
|
|
static void m5208_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_BRAL);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_USP);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cfv4e_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_BRAL);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_USP);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void any_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
CPUM68KState *env = &cpu->env;
|
|
|
|
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_BRAL);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
|
2019-06-07 02:41:25 +03:00
|
|
|
/*
|
|
|
|
* MAC and EMAC are mututally exclusive, so pick EMAC.
|
|
|
|
* It's mostly backwards compatible.
|
|
|
|
*/
|
2012-04-15 05:30:10 +04:00
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_USP);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
|
|
|
|
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
|
|
|
|
}
|
|
|
|
|
2013-01-05 18:15:30 +04:00
|
|
|
static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
|
|
|
|
{
|
2013-07-27 04:53:25 +04:00
|
|
|
CPUState *cs = CPU(dev);
|
2013-01-05 18:15:30 +04:00
|
|
|
M68kCPU *cpu = M68K_CPU(dev);
|
|
|
|
M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
|
2016-10-20 14:26:03 +03:00
|
|
|
Error *local_err = NULL;
|
|
|
|
|
2017-08-24 19:31:34 +03:00
|
|
|
register_m68k_insns(&cpu->env);
|
|
|
|
|
2016-10-20 14:26:03 +03:00
|
|
|
cpu_exec_realizefn(cs, &local_err);
|
|
|
|
if (local_err != NULL) {
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
2013-01-05 18:15:30 +04:00
|
|
|
|
|
|
|
m68k_cpu_init_gdb(cpu);
|
|
|
|
|
2013-07-27 04:53:25 +04:00
|
|
|
cpu_reset(cs);
|
|
|
|
qemu_init_vcpu(cs);
|
2013-01-05 18:15:30 +04:00
|
|
|
|
|
|
|
mcc->parent_realize(dev, errp);
|
|
|
|
}
|
|
|
|
|
2012-04-15 03:10:56 +04:00
|
|
|
static void m68k_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
M68kCPU *cpu = M68K_CPU(obj);
|
|
|
|
|
2019-03-29 00:26:22 +03:00
|
|
|
cpu_set_cpustate_pointers(cpu);
|
2012-04-15 03:10:56 +04:00
|
|
|
}
|
|
|
|
|
2020-10-22 23:30:00 +03:00
|
|
|
#if defined(CONFIG_SOFTMMU)
|
|
|
|
static bool fpu_needed(void *opaque)
|
|
|
|
{
|
|
|
|
M68kCPU *s = opaque;
|
|
|
|
|
|
|
|
return m68k_feature(&s->env, M68K_FEATURE_CF_FPU) ||
|
|
|
|
m68k_feature(&s->env, M68K_FEATURE_FPU);
|
|
|
|
}
|
|
|
|
|
|
|
|
typedef struct m68k_FPReg_tmp {
|
|
|
|
FPReg *parent;
|
|
|
|
uint64_t tmp_mant;
|
|
|
|
uint16_t tmp_exp;
|
|
|
|
} m68k_FPReg_tmp;
|
|
|
|
|
|
|
|
static void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
|
|
|
|
{
|
|
|
|
CPU_LDoubleU temp;
|
|
|
|
|
|
|
|
temp.d = f;
|
|
|
|
*pmant = temp.l.lower;
|
|
|
|
*pexp = temp.l.upper;
|
|
|
|
}
|
|
|
|
|
|
|
|
static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
|
|
|
|
{
|
|
|
|
CPU_LDoubleU temp;
|
|
|
|
|
|
|
|
temp.l.upper = upper;
|
|
|
|
temp.l.lower = mant;
|
|
|
|
return temp.d;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int freg_pre_save(void *opaque)
|
|
|
|
{
|
|
|
|
m68k_FPReg_tmp *tmp = opaque;
|
|
|
|
|
|
|
|
cpu_get_fp80(&tmp->tmp_mant, &tmp->tmp_exp, tmp->parent->d);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int freg_post_load(void *opaque, int version)
|
|
|
|
{
|
|
|
|
m68k_FPReg_tmp *tmp = opaque;
|
|
|
|
|
|
|
|
tmp->parent->d = cpu_set_fp80(tmp->tmp_mant, tmp->tmp_exp);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_freg_tmp = {
|
|
|
|
.name = "freg_tmp",
|
|
|
|
.post_load = freg_post_load,
|
|
|
|
.pre_save = freg_pre_save,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT64(tmp_mant, m68k_FPReg_tmp),
|
|
|
|
VMSTATE_UINT16(tmp_exp, m68k_FPReg_tmp),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_freg = {
|
|
|
|
.name = "freg",
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_WITH_TMP(FPReg, m68k_FPReg_tmp, vmstate_freg_tmp),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static int fpu_post_load(void *opaque, int version)
|
|
|
|
{
|
|
|
|
M68kCPU *s = opaque;
|
|
|
|
|
|
|
|
cpu_m68k_restore_fp_status(&s->env);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
const VMStateDescription vmmstate_fpu = {
|
|
|
|
.name = "cpu/fpu",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = fpu_needed,
|
|
|
|
.post_load = fpu_post_load,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT32(env.fpcr, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.fpsr, M68kCPU),
|
|
|
|
VMSTATE_STRUCT_ARRAY(env.fregs, M68kCPU, 8, 0, vmstate_freg, FPReg),
|
|
|
|
VMSTATE_STRUCT(env.fp_result, M68kCPU, 0, vmstate_freg, FPReg),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static bool cf_spregs_needed(void *opaque)
|
|
|
|
{
|
|
|
|
M68kCPU *s = opaque;
|
|
|
|
|
|
|
|
return m68k_feature(&s->env, M68K_FEATURE_CF_ISA_A);
|
|
|
|
}
|
|
|
|
|
|
|
|
const VMStateDescription vmstate_cf_spregs = {
|
|
|
|
.name = "cpu/cf_spregs",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = cf_spregs_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT64_ARRAY(env.macc, M68kCPU, 4),
|
|
|
|
VMSTATE_UINT32(env.macsr, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.mac_mask, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.rambar0, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.mbar, M68kCPU),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static bool cpu_68040_mmu_needed(void *opaque)
|
|
|
|
{
|
|
|
|
M68kCPU *s = opaque;
|
|
|
|
|
|
|
|
return m68k_feature(&s->env, M68K_FEATURE_M68040);
|
|
|
|
}
|
|
|
|
|
|
|
|
const VMStateDescription vmstate_68040_mmu = {
|
|
|
|
.name = "cpu/68040_mmu",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = cpu_68040_mmu_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT32(env.mmu.ar, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.mmu.ssw, M68kCPU),
|
|
|
|
VMSTATE_UINT16(env.mmu.tcr, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.mmu.urp, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.mmu.srp, M68kCPU),
|
|
|
|
VMSTATE_BOOL(env.mmu.fault, M68kCPU),
|
|
|
|
VMSTATE_UINT32_ARRAY(env.mmu.ttr, M68kCPU, 4),
|
|
|
|
VMSTATE_UINT32(env.mmu.mmusr, M68kCPU),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static bool cpu_68040_spregs_needed(void *opaque)
|
|
|
|
{
|
|
|
|
M68kCPU *s = opaque;
|
|
|
|
|
|
|
|
return m68k_feature(&s->env, M68K_FEATURE_M68040);
|
|
|
|
}
|
|
|
|
|
|
|
|
const VMStateDescription vmstate_68040_spregs = {
|
|
|
|
.name = "cpu/68040_spregs",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = cpu_68040_spregs_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT32(env.vbr, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.cacr, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.sfc, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.dfc, M68kCPU),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2013-01-20 22:53:28 +04:00
|
|
|
static const VMStateDescription vmstate_m68k_cpu = {
|
|
|
|
.name = "cpu",
|
2020-10-22 23:30:00 +03:00
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT32_ARRAY(env.dregs, M68kCPU, 8),
|
|
|
|
VMSTATE_UINT32_ARRAY(env.aregs, M68kCPU, 8),
|
|
|
|
VMSTATE_UINT32(env.pc, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.sr, M68kCPU),
|
|
|
|
VMSTATE_INT32(env.current_sp, M68kCPU),
|
|
|
|
VMSTATE_UINT32_ARRAY(env.sp, M68kCPU, 3),
|
|
|
|
VMSTATE_UINT32(env.cc_op, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.cc_x, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.cc_n, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.cc_v, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.cc_c, M68kCPU),
|
|
|
|
VMSTATE_UINT32(env.cc_z, M68kCPU),
|
|
|
|
VMSTATE_INT32(env.pending_vector, M68kCPU),
|
|
|
|
VMSTATE_INT32(env.pending_level, M68kCPU),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
.subsections = (const VMStateDescription * []) {
|
|
|
|
&vmmstate_fpu,
|
|
|
|
&vmstate_cf_spregs,
|
|
|
|
&vmstate_68040_mmu,
|
|
|
|
&vmstate_68040_spregs,
|
|
|
|
NULL
|
|
|
|
},
|
2013-01-20 22:53:28 +04:00
|
|
|
};
|
2020-10-22 23:30:00 +03:00
|
|
|
#endif
|
2013-01-20 22:53:28 +04:00
|
|
|
|
2021-05-17 13:51:31 +03:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
#include "hw/core/sysemu-cpu-ops.h"
|
|
|
|
|
|
|
|
static const struct SysemuCPUOps m68k_sysemu_ops = {
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2021-02-04 19:39:23 +03:00
|
|
|
#include "hw/core/tcg-cpu-ops.h"
|
|
|
|
|
|
|
|
static struct TCGCPUOps m68k_tcg_ops = {
|
|
|
|
.initialize = m68k_tcg_init,
|
|
|
|
.cpu_exec_interrupt = m68k_cpu_exec_interrupt,
|
|
|
|
.tlb_fill = m68k_cpu_tlb_fill,
|
|
|
|
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
.do_interrupt = m68k_cpu_do_interrupt,
|
|
|
|
.do_transaction_failed = m68k_cpu_transaction_failed,
|
|
|
|
#endif /* !CONFIG_USER_ONLY */
|
|
|
|
};
|
|
|
|
|
2012-04-15 02:35:50 +04:00
|
|
|
static void m68k_cpu_class_init(ObjectClass *c, void *data)
|
|
|
|
{
|
|
|
|
M68kCPUClass *mcc = M68K_CPU_CLASS(c);
|
|
|
|
CPUClass *cc = CPU_CLASS(c);
|
2013-01-20 22:53:28 +04:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(c);
|
2012-04-15 02:35:50 +04:00
|
|
|
|
2018-01-14 05:04:12 +03:00
|
|
|
device_class_set_parent_realize(dc, m68k_cpu_realizefn,
|
|
|
|
&mcc->parent_realize);
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 13:05:11 +03:00
|
|
|
device_class_set_parent_reset(dc, m68k_cpu_reset, &mcc->parent_reset);
|
2013-01-21 20:50:15 +04:00
|
|
|
|
|
|
|
cc->class_by_name = m68k_cpu_class_by_name;
|
2013-08-25 20:53:55 +04:00
|
|
|
cc->has_work = m68k_cpu_has_work;
|
2013-05-27 03:33:50 +04:00
|
|
|
cc->dump_state = m68k_cpu_dump_state;
|
2013-06-28 22:35:01 +04:00
|
|
|
cc->set_pc = m68k_cpu_set_pc;
|
2013-06-29 06:18:45 +04:00
|
|
|
cc->gdb_read_register = m68k_cpu_gdb_read_register;
|
|
|
|
cc->gdb_write_register = m68k_cpu_gdb_write_register;
|
2018-01-18 22:38:41 +03:00
|
|
|
#if defined(CONFIG_SOFTMMU)
|
2013-06-29 20:55:54 +04:00
|
|
|
cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
|
2020-10-22 23:30:00 +03:00
|
|
|
dc->vmsd = &vmstate_m68k_cpu;
|
2021-05-17 13:51:31 +03:00
|
|
|
cc->sysemu_ops = &m68k_sysemu_ops;
|
2013-06-29 20:55:54 +04:00
|
|
|
#endif
|
2015-07-12 05:00:00 +03:00
|
|
|
cc->disas_set_info = m68k_cpu_disas_set_info;
|
2014-09-13 20:45:15 +04:00
|
|
|
|
2013-06-29 01:18:47 +04:00
|
|
|
cc->gdb_num_core_regs = 18;
|
2021-02-04 19:39:23 +03:00
|
|
|
cc->tcg_ops = &m68k_tcg_ops;
|
2012-04-15 02:35:50 +04:00
|
|
|
}
|
|
|
|
|
2020-04-30 22:01:22 +03:00
|
|
|
static void m68k_cpu_class_init_cf_core(ObjectClass *c, void *data)
|
|
|
|
{
|
|
|
|
CPUClass *cc = CPU_CLASS(c);
|
|
|
|
|
|
|
|
cc->gdb_core_xml_file = "cf-core.xml";
|
|
|
|
}
|
|
|
|
|
|
|
|
#define DEFINE_M68K_CPU_TYPE_CF(model) \
|
|
|
|
{ \
|
|
|
|
.name = M68K_CPU_TYPE_NAME(#model), \
|
|
|
|
.instance_init = model##_cpu_initfn, \
|
|
|
|
.parent = TYPE_M68K_CPU, \
|
|
|
|
.class_init = m68k_cpu_class_init_cf_core \
|
|
|
|
}
|
|
|
|
|
|
|
|
static void m68k_cpu_class_init_m68k_core(ObjectClass *c, void *data)
|
|
|
|
{
|
|
|
|
CPUClass *cc = CPU_CLASS(c);
|
|
|
|
|
|
|
|
cc->gdb_core_xml_file = "m68k-core.xml";
|
|
|
|
}
|
|
|
|
|
|
|
|
#define DEFINE_M68K_CPU_TYPE_M68K(model) \
|
|
|
|
{ \
|
|
|
|
.name = M68K_CPU_TYPE_NAME(#model), \
|
|
|
|
.instance_init = model##_cpu_initfn, \
|
|
|
|
.parent = TYPE_M68K_CPU, \
|
|
|
|
.class_init = m68k_cpu_class_init_m68k_core \
|
2017-10-05 16:50:45 +03:00
|
|
|
}
|
2012-04-15 05:30:10 +04:00
|
|
|
|
2017-10-05 16:50:45 +03:00
|
|
|
static const TypeInfo m68k_cpus_type_infos[] = {
|
|
|
|
{ /* base class should be registered first */
|
|
|
|
.name = TYPE_M68K_CPU,
|
|
|
|
.parent = TYPE_CPU,
|
|
|
|
.instance_size = sizeof(M68kCPU),
|
|
|
|
.instance_init = m68k_cpu_initfn,
|
|
|
|
.abstract = true,
|
|
|
|
.class_size = sizeof(M68kCPUClass),
|
|
|
|
.class_init = m68k_cpu_class_init,
|
|
|
|
},
|
2020-04-30 22:01:22 +03:00
|
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68000),
|
2021-02-01 03:01:52 +03:00
|
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68010),
|
2020-04-30 22:01:22 +03:00
|
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68020),
|
|
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68030),
|
|
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68040),
|
|
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68060),
|
|
|
|
DEFINE_M68K_CPU_TYPE_CF(m5206),
|
|
|
|
DEFINE_M68K_CPU_TYPE_CF(m5208),
|
|
|
|
DEFINE_M68K_CPU_TYPE_CF(cfv4e),
|
|
|
|
DEFINE_M68K_CPU_TYPE_CF(any),
|
2012-04-15 02:35:50 +04:00
|
|
|
};
|
|
|
|
|
2017-10-05 16:50:45 +03:00
|
|
|
DEFINE_TYPES(m68k_cpus_type_infos)
|