2012-09-02 11:33:31 +04:00
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/*
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* S/390 FPU helper routines
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2009 Alexander Graf
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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2016-01-26 21:17:00 +03:00
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#include "qemu/osdep.h"
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2012-09-02 11:33:31 +04:00
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#include "cpu.h"
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2016-03-15 15:18:37 +03:00
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#include "exec/exec-all.h"
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2014-03-28 22:42:10 +04:00
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#include "exec/cpu_ldst.h"
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2014-04-08 09:31:41 +04:00
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#include "exec/helper-proto.h"
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2012-09-02 11:33:31 +04:00
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/* #define DEBUG_HELPER */
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#ifdef DEBUG_HELPER
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#define HELPER_LOG(x...) qemu_log(x)
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#else
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#define HELPER_LOG(x...)
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#endif
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2012-08-23 21:48:20 +04:00
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#define RET128(F) (env->retxl = F.low, F.high)
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#define convert_bit(mask, from, to) \
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(to < from \
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? (mask / (from / to)) & to \
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: (mask & from) * (to / from))
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static void ieee_exception(CPUS390XState *env, uint32_t dxc, uintptr_t retaddr)
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{
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/* Install the DXC code. */
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env->fpc = (env->fpc & ~0xff00) | (dxc << 8);
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/* Trap. */
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runtime_exception(env, PGM_DATA, retaddr);
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}
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/* Should be called after any operation that may raise IEEE exceptions. */
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static void handle_exceptions(CPUS390XState *env, uintptr_t retaddr)
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{
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unsigned s390_exc, qemu_exc;
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/* Get the exceptions raised by the current operation. Reset the
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fpu_status contents so that the next operation has a clean slate. */
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qemu_exc = env->fpu_status.float_exception_flags;
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if (qemu_exc == 0) {
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return;
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}
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env->fpu_status.float_exception_flags = 0;
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/* Convert softfloat exception bits to s390 exception bits. */
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s390_exc = 0;
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s390_exc |= convert_bit(qemu_exc, float_flag_invalid, 0x80);
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s390_exc |= convert_bit(qemu_exc, float_flag_divbyzero, 0x40);
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s390_exc |= convert_bit(qemu_exc, float_flag_overflow, 0x20);
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s390_exc |= convert_bit(qemu_exc, float_flag_underflow, 0x10);
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s390_exc |= convert_bit(qemu_exc, float_flag_inexact, 0x08);
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/* Install the exceptions that we raised. */
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env->fpc |= s390_exc << 16;
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/* Send signals for enabled exceptions. */
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s390_exc &= env->fpc >> 24;
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if (s390_exc) {
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ieee_exception(env, s390_exc, retaddr);
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}
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}
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2012-09-02 11:33:36 +04:00
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static inline int float_comp_to_cc(CPUS390XState *env, int float_compare)
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2012-09-02 11:33:31 +04:00
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{
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2013-09-03 19:38:47 +04:00
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S390CPU *cpu = s390_env_get_cpu(env);
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2012-09-02 11:33:31 +04:00
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switch (float_compare) {
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case float_relation_equal:
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return 0;
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case float_relation_less:
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return 1;
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case float_relation_greater:
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return 2;
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case float_relation_unordered:
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return 3;
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default:
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2013-09-03 19:38:47 +04:00
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cpu_abort(CPU(cpu), "unknown return value for float compare\n");
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2012-09-02 11:33:31 +04:00
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}
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}
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/* condition codes for unary FP ops */
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uint32_t set_cc_nz_f32(float32 v)
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{
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if (float32_is_any_nan(v)) {
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return 3;
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} else if (float32_is_zero(v)) {
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return 0;
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} else if (float32_is_neg(v)) {
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return 1;
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} else {
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return 2;
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}
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}
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uint32_t set_cc_nz_f64(float64 v)
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{
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if (float64_is_any_nan(v)) {
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return 3;
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} else if (float64_is_zero(v)) {
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return 0;
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} else if (float64_is_neg(v)) {
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return 1;
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} else {
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return 2;
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}
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}
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2012-08-23 21:48:20 +04:00
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uint32_t set_cc_nz_f128(float128 v)
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2012-09-02 11:33:31 +04:00
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{
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if (float128_is_any_nan(v)) {
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return 3;
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} else if (float128_is_zero(v)) {
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return 0;
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} else if (float128_is_neg(v)) {
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return 1;
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} else {
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return 2;
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}
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}
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2012-08-23 21:48:20 +04:00
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/* 32-bit FP addition */
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uint64_t HELPER(aeb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-08-23 21:48:20 +04:00
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float32 ret = float32_add(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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2012-09-02 11:33:31 +04:00
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}
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2012-08-23 21:48:20 +04:00
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/* 64-bit FP addition */
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uint64_t HELPER(adb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-08-23 21:48:20 +04:00
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float64 ret = float64_add(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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}
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2012-09-02 11:33:31 +04:00
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2012-08-23 21:48:20 +04:00
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/* 128-bit FP addition */
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uint64_t HELPER(axb)(CPUS390XState *env, uint64_t ah, uint64_t al,
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uint64_t bh, uint64_t bl)
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{
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float128 ret = float128_add(make_float128(ah, al),
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make_float128(bh, bl),
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&env->fpu_status);
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handle_exceptions(env, GETPC());
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return RET128(ret);
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2012-09-02 11:33:31 +04:00
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}
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2012-08-23 22:05:03 +04:00
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/* 32-bit FP subtraction */
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uint64_t HELPER(seb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-08-23 22:05:03 +04:00
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float32 ret = float32_sub(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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2012-09-02 11:33:31 +04:00
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}
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2012-08-23 22:05:03 +04:00
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/* 64-bit FP subtraction */
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uint64_t HELPER(sdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-08-23 22:05:03 +04:00
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float64 ret = float64_sub(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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}
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2012-09-02 11:33:31 +04:00
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2012-08-23 22:05:03 +04:00
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/* 128-bit FP subtraction */
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uint64_t HELPER(sxb)(CPUS390XState *env, uint64_t ah, uint64_t al,
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uint64_t bh, uint64_t bl)
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{
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float128 ret = float128_sub(make_float128(ah, al),
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make_float128(bh, bl),
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&env->fpu_status);
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handle_exceptions(env, GETPC());
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return RET128(ret);
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2012-09-02 11:33:31 +04:00
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}
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2012-09-07 22:41:12 +04:00
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/* 32-bit FP division */
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uint64_t HELPER(deb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-09-07 22:41:12 +04:00
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float32 ret = float32_div(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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2012-09-02 11:33:31 +04:00
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}
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2012-09-07 22:41:12 +04:00
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/* 64-bit FP division */
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uint64_t HELPER(ddb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-09-07 22:41:12 +04:00
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float64 ret = float64_div(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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}
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2012-09-02 11:33:31 +04:00
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2012-09-07 22:41:12 +04:00
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/* 128-bit FP division */
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uint64_t HELPER(dxb)(CPUS390XState *env, uint64_t ah, uint64_t al,
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uint64_t bh, uint64_t bl)
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{
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float128 ret = float128_div(make_float128(ah, al),
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make_float128(bh, bl),
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&env->fpu_status);
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handle_exceptions(env, GETPC());
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return RET128(ret);
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2012-09-02 11:33:31 +04:00
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}
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2012-08-23 23:02:38 +04:00
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/* 32-bit FP multiplication */
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uint64_t HELPER(meeb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-08-23 23:02:38 +04:00
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float32 ret = float32_mul(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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2012-09-02 11:33:31 +04:00
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}
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2012-08-23 23:02:38 +04:00
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/* 64-bit FP multiplication */
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uint64_t HELPER(mdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-08-23 23:02:38 +04:00
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float64 ret = float64_mul(f1, f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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}
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2012-09-02 11:33:31 +04:00
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2012-08-23 23:02:38 +04:00
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/* 64/32-bit FP multiplication */
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uint64_t HELPER(mdeb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
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{
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float64 ret = float32_to_float64(f2, &env->fpu_status);
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ret = float64_mul(f1, ret, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return ret;
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}
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/* 128-bit FP multiplication */
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uint64_t HELPER(mxb)(CPUS390XState *env, uint64_t ah, uint64_t al,
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uint64_t bh, uint64_t bl)
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{
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float128 ret = float128_mul(make_float128(ah, al),
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make_float128(bh, bl),
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&env->fpu_status);
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handle_exceptions(env, GETPC());
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return RET128(ret);
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}
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/* 128/64-bit FP multiplication */
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uint64_t HELPER(mxdb)(CPUS390XState *env, uint64_t ah, uint64_t al,
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uint64_t f2)
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{
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float128 ret = float64_to_float128(f2, &env->fpu_status);
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ret = float128_mul(make_float128(ah, al), ret, &env->fpu_status);
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handle_exceptions(env, GETPC());
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return RET128(ret);
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2012-09-02 11:33:31 +04:00
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}
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/* convert 32-bit float to 64-bit float */
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2012-08-23 21:48:20 +04:00
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uint64_t HELPER(ldeb)(CPUS390XState *env, uint64_t f2)
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2012-09-02 11:33:31 +04:00
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{
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2012-08-23 21:48:20 +04:00
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float64 ret = float32_to_float64(f2, &env->fpu_status);
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handle_exceptions(env, GETPC());
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softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
return float64_maybe_silence_nan(ret, &env->fpu_status);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 128-bit float to 64-bit float */
|
2012-08-23 21:48:20 +04:00
|
|
|
uint64_t HELPER(ldxb)(CPUS390XState *env, uint64_t ah, uint64_t al)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 21:48:20 +04:00
|
|
|
float64 ret = float128_to_float64(make_float128(ah, al), &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
return float64_maybe_silence_nan(ret, &env->fpu_status);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit float to 128-bit float */
|
2012-08-23 21:48:20 +04:00
|
|
|
uint64_t HELPER(lxdb)(CPUS390XState *env, uint64_t f2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 21:48:20 +04:00
|
|
|
float128 ret = float64_to_float128(f2, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
return RET128(float128_maybe_silence_nan(ret, &env->fpu_status));
|
2012-08-23 21:48:20 +04:00
|
|
|
}
|
2012-09-02 11:33:31 +04:00
|
|
|
|
2012-08-23 21:48:20 +04:00
|
|
|
/* convert 32-bit float to 128-bit float */
|
|
|
|
uint64_t HELPER(lxeb)(CPUS390XState *env, uint64_t f2)
|
|
|
|
{
|
|
|
|
float128 ret = float32_to_float128(f2, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
return RET128(float128_maybe_silence_nan(ret, &env->fpu_status));
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit float to 32-bit float */
|
2012-08-23 21:48:20 +04:00
|
|
|
uint64_t HELPER(ledb)(CPUS390XState *env, uint64_t f2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 21:48:20 +04:00
|
|
|
float32 ret = float64_to_float32(f2, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
return float32_maybe_silence_nan(ret, &env->fpu_status);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 128-bit float to 32-bit float */
|
2012-08-23 21:48:20 +04:00
|
|
|
uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, uint64_t al)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 21:48:20 +04:00
|
|
|
float32 ret = float128_to_float32(make_float128(ah, al), &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
return float32_maybe_silence_nan(ret, &env->fpu_status);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-23 21:48:20 +04:00
|
|
|
/* 32-bit FP compare */
|
|
|
|
uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 21:48:20 +04:00
|
|
|
int cmp = float32_compare_quiet(f1, f2, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return float_comp_to_cc(env, cmp);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-23 21:48:20 +04:00
|
|
|
/* 64-bit FP compare */
|
|
|
|
uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 21:48:20 +04:00
|
|
|
int cmp = float64_compare_quiet(f1, f2, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return float_comp_to_cc(env, cmp);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-23 21:48:20 +04:00
|
|
|
/* 128-bit FP compare */
|
|
|
|
uint32_t HELPER(cxb)(CPUS390XState *env, uint64_t ah, uint64_t al,
|
|
|
|
uint64_t bh, uint64_t bl)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 21:48:20 +04:00
|
|
|
int cmp = float128_compare_quiet(make_float128(ah, al),
|
|
|
|
make_float128(bh, bl),
|
|
|
|
&env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return float_comp_to_cc(env, cmp);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-24 02:17:35 +04:00
|
|
|
static int swap_round_mode(CPUS390XState *env, int m3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 02:17:35 +04:00
|
|
|
int ret = env->fpu_status.float_rounding_mode;
|
2012-09-02 11:33:31 +04:00
|
|
|
switch (m3) {
|
|
|
|
case 0:
|
|
|
|
/* current mode */
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
/* biased round no nearest */
|
|
|
|
case 4:
|
|
|
|
/* round to nearest */
|
|
|
|
set_float_rounding_mode(float_round_nearest_even, &env->fpu_status);
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
/* round to zero */
|
|
|
|
set_float_rounding_mode(float_round_to_zero, &env->fpu_status);
|
|
|
|
break;
|
|
|
|
case 6:
|
|
|
|
/* round to +inf */
|
|
|
|
set_float_rounding_mode(float_round_up, &env->fpu_status);
|
|
|
|
break;
|
|
|
|
case 7:
|
|
|
|
/* round to -inf */
|
|
|
|
set_float_rounding_mode(float_round_down, &env->fpu_status);
|
|
|
|
break;
|
|
|
|
}
|
2012-08-24 02:17:35 +04:00
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-24 08:08:22 +04:00
|
|
|
/* convert 64-bit int to 32-bit float */
|
|
|
|
uint64_t HELPER(cegb)(CPUS390XState *env, int64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float32 ret = int64_to_float32(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit int to 64-bit float */
|
|
|
|
uint64_t HELPER(cdgb)(CPUS390XState *env, int64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float64 ret = int64_to_float64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit int to 128-bit float */
|
|
|
|
uint64_t HELPER(cxgb)(CPUS390XState *env, int64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float128 ret = int64_to_float128(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
2012-09-01 22:08:17 +04:00
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return RET128(ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit uint to 32-bit float */
|
|
|
|
uint64_t HELPER(celgb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float32 ret = uint64_to_float32(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit uint to 64-bit float */
|
|
|
|
uint64_t HELPER(cdlgb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float64 ret = uint64_to_float64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit uint to 128-bit float */
|
|
|
|
uint64_t HELPER(cxlgb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
2012-09-10 03:04:17 +04:00
|
|
|
float128 ret = uint64_to_float128(v2, &env->fpu_status);
|
2012-09-01 22:08:17 +04:00
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
2012-08-24 08:08:22 +04:00
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return RET128(ret);
|
|
|
|
}
|
|
|
|
|
2012-09-02 11:33:31 +04:00
|
|
|
/* convert 32-bit float to 64-bit int */
|
2012-08-24 02:17:35 +04:00
|
|
|
uint64_t HELPER(cgeb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 02:17:35 +04:00
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
int64_t ret = float32_to_int64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit float to 64-bit int */
|
2012-08-24 02:17:35 +04:00
|
|
|
uint64_t HELPER(cgdb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 02:17:35 +04:00
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
int64_t ret = float64_to_int64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 128-bit float to 64-bit int */
|
2012-08-24 02:17:35 +04:00
|
|
|
uint64_t HELPER(cgxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 02:17:35 +04:00
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float128 v2 = make_float128(h, l);
|
|
|
|
int64_t ret = float128_to_int64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 32-bit float to 32-bit int */
|
2012-08-24 02:17:35 +04:00
|
|
|
uint64_t HELPER(cfeb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 02:17:35 +04:00
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
int32_t ret = float32_to_int32(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit float to 32-bit int */
|
2012-08-24 02:17:35 +04:00
|
|
|
uint64_t HELPER(cfdb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 02:17:35 +04:00
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
int32_t ret = float64_to_int32(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 128-bit float to 32-bit int */
|
2012-08-24 02:17:35 +04:00
|
|
|
uint64_t HELPER(cfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 02:17:35 +04:00
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float128 v2 = make_float128(h, l);
|
|
|
|
int32_t ret = float128_to_int32(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-09-01 21:42:54 +04:00
|
|
|
/* convert 32-bit float to 64-bit uint */
|
|
|
|
uint64_t HELPER(clgeb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
uint64_t ret;
|
|
|
|
v2 = float32_to_float64(v2, &env->fpu_status);
|
|
|
|
ret = float64_to_uint64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit float to 64-bit uint */
|
|
|
|
uint64_t HELPER(clgdb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
uint64_t ret = float64_to_uint64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 128-bit float to 64-bit uint */
|
|
|
|
uint64_t HELPER(clgxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float128 v2 = make_float128(h, l);
|
|
|
|
/* ??? Not 100% correct. */
|
|
|
|
uint64_t ret = float128_to_int64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 32-bit float to 32-bit uint */
|
|
|
|
uint64_t HELPER(clfeb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
uint32_t ret = float32_to_uint32(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 64-bit float to 32-bit uint */
|
|
|
|
uint64_t HELPER(clfdb)(CPUS390XState *env, uint64_t v2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
uint32_t ret = float64_to_uint32(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convert 128-bit float to 32-bit uint */
|
|
|
|
uint64_t HELPER(clfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float128 v2 = make_float128(h, l);
|
|
|
|
/* Not 100% correct. */
|
|
|
|
uint32_t ret = float128_to_int64(v2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-06-04 00:09:46 +03:00
|
|
|
/* round to integer 32-bit */
|
|
|
|
uint64_t HELPER(fieb)(CPUS390XState *env, uint64_t f2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float32 ret = float32_round_to_int(f2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* round to integer 64-bit */
|
|
|
|
uint64_t HELPER(fidb)(CPUS390XState *env, uint64_t f2, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float64 ret = float64_round_to_int(f2, &env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* round to integer 128-bit */
|
|
|
|
uint64_t HELPER(fixb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint32_t m3)
|
|
|
|
{
|
|
|
|
int hold = swap_round_mode(env, m3);
|
|
|
|
float128 ret = float128_round_to_int(make_float128(ah, al),
|
|
|
|
&env->fpu_status);
|
|
|
|
set_float_rounding_mode(hold, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return RET128(ret);
|
|
|
|
}
|
|
|
|
|
2012-08-23 23:30:12 +04:00
|
|
|
/* 32-bit FP multiply and add */
|
|
|
|
uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1,
|
|
|
|
uint64_t f2, uint64_t f3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 23:30:12 +04:00
|
|
|
float32 ret = float32_muladd(f2, f3, f1, 0, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-23 23:30:12 +04:00
|
|
|
/* 64-bit FP multiply and add */
|
|
|
|
uint64_t HELPER(madb)(CPUS390XState *env, uint64_t f1,
|
|
|
|
uint64_t f2, uint64_t f3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 23:30:12 +04:00
|
|
|
float64 ret = float64_muladd(f2, f3, f1, 0, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-23 23:30:12 +04:00
|
|
|
/* 32-bit FP multiply and subtract */
|
|
|
|
uint64_t HELPER(mseb)(CPUS390XState *env, uint64_t f1,
|
|
|
|
uint64_t f2, uint64_t f3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 23:30:12 +04:00
|
|
|
float32 ret = float32_muladd(f2, f3, f1, float_muladd_negate_c,
|
|
|
|
&env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-23 23:30:12 +04:00
|
|
|
/* 64-bit FP multiply and subtract */
|
|
|
|
uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1,
|
|
|
|
uint64_t f2, uint64_t f3)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 23:30:12 +04:00
|
|
|
float64 ret = float64_muladd(f2, f3, f1, float_muladd_negate_c,
|
|
|
|
&env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* test data class 32-bit */
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
uint32_t HELPER(tceb)(CPUS390XState *env, uint64_t f1, uint64_t m2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 23:40:09 +04:00
|
|
|
float32 v1 = f1;
|
2012-09-02 11:33:31 +04:00
|
|
|
int neg = float32_is_neg(v1);
|
|
|
|
uint32_t cc = 0;
|
|
|
|
|
|
|
|
if ((float32_is_zero(v1) && (m2 & (1 << (11-neg)))) ||
|
|
|
|
(float32_is_infinity(v1) && (m2 & (1 << (5-neg)))) ||
|
|
|
|
(float32_is_any_nan(v1) && (m2 & (1 << (3-neg)))) ||
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
(float32_is_signaling_nan(v1, &env->fpu_status) &&
|
|
|
|
(m2 & (1 << (1-neg))))) {
|
2012-09-02 11:33:31 +04:00
|
|
|
cc = 1;
|
|
|
|
} else if (m2 & (1 << (9-neg))) {
|
|
|
|
/* assume normalized number */
|
|
|
|
cc = 1;
|
|
|
|
}
|
|
|
|
/* FIXME: denormalized? */
|
|
|
|
return cc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* test data class 64-bit */
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
uint32_t HELPER(tcdb)(CPUS390XState *env, uint64_t v1, uint64_t m2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
|
|
|
int neg = float64_is_neg(v1);
|
|
|
|
uint32_t cc = 0;
|
|
|
|
|
|
|
|
if ((float64_is_zero(v1) && (m2 & (1 << (11-neg)))) ||
|
|
|
|
(float64_is_infinity(v1) && (m2 & (1 << (5-neg)))) ||
|
|
|
|
(float64_is_any_nan(v1) && (m2 & (1 << (3-neg)))) ||
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
(float64_is_signaling_nan(v1, &env->fpu_status) &&
|
|
|
|
(m2 & (1 << (1-neg))))) {
|
2012-09-02 11:33:31 +04:00
|
|
|
cc = 1;
|
|
|
|
} else if (m2 & (1 << (9-neg))) {
|
|
|
|
/* assume normalized number */
|
|
|
|
cc = 1;
|
|
|
|
}
|
|
|
|
/* FIXME: denormalized? */
|
|
|
|
return cc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* test data class 128-bit */
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
uint32_t HELPER(tcxb)(CPUS390XState *env, uint64_t ah,
|
|
|
|
uint64_t al, uint64_t m2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-23 23:40:09 +04:00
|
|
|
float128 v1 = make_float128(ah, al);
|
|
|
|
int neg = float128_is_neg(v1);
|
2012-09-02 11:33:31 +04:00
|
|
|
uint32_t cc = 0;
|
|
|
|
|
2012-08-23 23:40:09 +04:00
|
|
|
if ((float128_is_zero(v1) && (m2 & (1 << (11-neg)))) ||
|
|
|
|
(float128_is_infinity(v1) && (m2 & (1 << (5-neg)))) ||
|
|
|
|
(float128_is_any_nan(v1) && (m2 & (1 << (3-neg)))) ||
|
softfloat: Implement run-time-configurable meaning of signaling NaN bit
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).
Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.
Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.
QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.
On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.
The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
IMPORTANT:
This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.
Further break down of changes:
1) Added field snan_bit_is_one to the structure float_status, and
correspondent setter function set_snan_bit_is_one().
2) Constants <float16|float32|float64|floatx80|float128>_default_nan
(used both internally and externally) converted to functions
<float16|float32|float64|floatx80|float128>_default_nan(float_status*).
This is necessary since they are dependent on signaling bit meaning.
At the same time, for the sake of code cleanup and simplicity, constants
<floatx80|float128>_default_nan_<low|high> (used only internally within
SoftFloat library) are removed, as not needed.
3) Added a float_status* argument to SoftFloat library functions
XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
XXX_maybe_silence_nan(XXX a_). This argument must be present in
order to enable correct invocation of new version of functions
XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
here)
4) Updated code for all platforms to reflect changes in SoftFloat library.
This change is twofolds: it includes modifications of SoftFloat library
functions invocations, and an addition of invocation of function
set_snan_bit_is_one() during CPU initialization, with arguments that
are appropriate for each particular platform. It was established that
all platforms zero their main CPU data structures, so snan_bit_is_one(0)
in appropriate places is not added, as it is not needed.
[1] "IEEE Standard for Floating-Point Arithmetic",
IEEE Computer Society, August 29, 2008.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Tested-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[leon.alrae@imgtec.com:
* cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-06-10 12:57:28 +03:00
|
|
|
(float128_is_signaling_nan(v1, &env->fpu_status) &&
|
|
|
|
(m2 & (1 << (1-neg))))) {
|
2012-09-02 11:33:31 +04:00
|
|
|
cc = 1;
|
|
|
|
} else if (m2 & (1 << (9-neg))) {
|
|
|
|
/* assume normalized number */
|
|
|
|
cc = 1;
|
|
|
|
}
|
|
|
|
/* FIXME: denormalized? */
|
|
|
|
return cc;
|
|
|
|
}
|
|
|
|
|
2012-08-24 01:33:03 +04:00
|
|
|
/* square root 32-bit */
|
|
|
|
uint64_t HELPER(sqeb)(CPUS390XState *env, uint64_t f2)
|
2012-09-02 11:33:31 +04:00
|
|
|
{
|
2012-08-24 01:33:03 +04:00
|
|
|
float32 ret = float32_sqrt(f2, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* square root 64-bit */
|
|
|
|
uint64_t HELPER(sqdb)(CPUS390XState *env, uint64_t f2)
|
|
|
|
{
|
|
|
|
float64 ret = float64_sqrt(f2, &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* square root 128-bit */
|
|
|
|
uint64_t HELPER(sqxb)(CPUS390XState *env, uint64_t ah, uint64_t al)
|
|
|
|
{
|
|
|
|
float128 ret = float128_sqrt(make_float128(ah, al), &env->fpu_status);
|
|
|
|
handle_exceptions(env, GETPC());
|
|
|
|
return RET128(ret);
|
2012-09-02 11:33:31 +04:00
|
|
|
}
|
2012-08-24 18:44:43 +04:00
|
|
|
|
2012-09-11 04:23:13 +04:00
|
|
|
static const int fpc_to_rnd[4] = {
|
|
|
|
float_round_nearest_even,
|
|
|
|
float_round_to_zero,
|
|
|
|
float_round_up,
|
|
|
|
float_round_down
|
|
|
|
};
|
|
|
|
|
2012-08-24 18:44:43 +04:00
|
|
|
/* set fpc */
|
|
|
|
void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc)
|
|
|
|
{
|
|
|
|
/* Install everything in the main FPC. */
|
|
|
|
env->fpc = fpc;
|
|
|
|
|
|
|
|
/* Install the rounding mode in the shadow fpu_status. */
|
2012-09-11 04:23:13 +04:00
|
|
|
set_float_rounding_mode(fpc_to_rnd[fpc & 3], &env->fpu_status);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* set fpc and signal */
|
|
|
|
void HELPER(sfas)(CPUS390XState *env, uint64_t val)
|
|
|
|
{
|
|
|
|
uint32_t signalling = env->fpc;
|
|
|
|
uint32_t source = val;
|
|
|
|
uint32_t s390_exc;
|
|
|
|
|
|
|
|
/* The contents of the source operand are placed in the FPC register;
|
|
|
|
then the flags in the FPC register are set to the logical OR of the
|
|
|
|
signalling flags and the source flags. */
|
|
|
|
env->fpc = source | (signalling & 0x00ff0000);
|
|
|
|
set_float_rounding_mode(fpc_to_rnd[source & 3], &env->fpu_status);
|
|
|
|
|
|
|
|
/* If any signalling flag is 1 and the corresponding source mask
|
|
|
|
is also 1, a simulated-iee-exception trap occurs. */
|
|
|
|
s390_exc = (signalling >> 16) & (source >> 24);
|
|
|
|
if (s390_exc) {
|
|
|
|
ieee_exception(env, s390_exc | 3, GETPC());
|
|
|
|
}
|
2012-08-24 18:44:43 +04:00
|
|
|
}
|