2020-03-12 01:18:39 +03:00
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/*
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* Allwinner H3 Clock Control Unit emulation
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*
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* Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_MISC_ALLWINNER_H3_CCU_H
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#define HW_MISC_ALLWINNER_H3_CCU_H
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#include "qom/object.h"
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#include "hw/sysbus.h"
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/**
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* @name Constants
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* @{
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*/
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/** Size of register I/O address space used by CCU device */
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#define AW_H3_CCU_IOSIZE (0x400)
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/** Total number of known registers */
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#define AW_H3_CCU_REGS_NUM (AW_H3_CCU_IOSIZE / sizeof(uint32_t))
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/** @} */
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/**
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* @name Object model
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* @{
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*/
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#define TYPE_AW_H3_CCU "allwinner-h3-ccu"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(AwH3ClockCtlState, AW_H3_CCU)
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2020-03-12 01:18:39 +03:00
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/** @} */
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/**
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* Allwinner H3 CCU object instance state.
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*/
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2020-09-03 23:43:22 +03:00
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struct AwH3ClockCtlState {
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2020-03-12 01:18:39 +03:00
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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/** Maps I/O registers in physical memory */
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MemoryRegion iomem;
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/** Array of hardware registers */
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uint32_t regs[AW_H3_CCU_REGS_NUM];
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2020-09-03 23:43:22 +03:00
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};
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2020-03-12 01:18:39 +03:00
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#endif /* HW_MISC_ALLWINNER_H3_CCU_H */
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