98 lines
1.6 KiB
ArmAsm
98 lines
1.6 KiB
ArmAsm
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#include "macros.inc"
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.purgem test_init
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.macro test_init
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call0 cache_unlock_invalidate
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.endm
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test_suite cache
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.macro pf_op op
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\op a2, 0
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\op a3, 0
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\op a4, 0
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.endm
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test prefetch
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movi a2, 0xd0000000 /* cacheable */
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movi a3, 0xd8000000 /* non-cacheable */
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movi a4, 0x00001235 /* unmapped */
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pf_op dpfr
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pf_op dpfro
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pf_op dpfw
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pf_op dpfwo
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pf_op ipf
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dpfl a2, 0
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ipfl a2, 0
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test_end
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.macro cache_fault op, addr, exc_code
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set_vector kernel, 2f
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movi a4, \addr
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1:
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\op a4, 0
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test_fail
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2:
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rsr a2, epc1
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movi a3, 1b
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assert eq, a2, a3
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rsr a2, excvaddr
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assert eq, a2, a4
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rsr a2, exccause
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movi a3, \exc_code
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assert eq, a2, a3
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.endm
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test dpfl_tlb_miss
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cache_fault dpfl, 0x00002345, 24
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test_end
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test dhwb_tlb_miss
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cache_fault dhwb, 0x00002345, 24
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test_end
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test dhwbi_tlb_miss
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cache_fault dhwbi, 0x00002345, 24
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test_end
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test dhi_tlb_miss
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cache_fault dhi, 0x00002345, 24
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test_end
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test dhu_tlb_miss
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cache_fault dhu, 0x00002345, 24
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test_end
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test ipfl_tlb_miss
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cache_fault ipfl, 0x00002345, 16
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test_end
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test ihu_tlb_miss
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cache_fault ihu, 0x00002345, 16
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test_end
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test ihi_tlb_miss
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cache_fault ihi, 0x00002345, 16
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test_end
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test_suite_end
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.macro cache_all op1, op2, size, linesize
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movi a2, 0
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movi a3, \size
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1:
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\op1 a2, 0
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\op2 a2, 0
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addi a2, a2, \linesize
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bltu a2, a3, 1b
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.endm
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cache_unlock_invalidate:
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cache_all diu, dii, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE
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cache_all iiu, iii, XCHAL_ICACHE_SIZE, XCHAL_ICACHE_LINESIZE
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ret
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