2022-12-01 15:11:23 +03:00
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/*
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* HMP commands related to PCI
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*
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* Copyright IBM, Corp. 2011
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "monitor/hmp.h"
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#include "monitor/monitor.h"
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#include "qapi/error.h"
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#include "qapi/qapi-commands-pci.h"
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static void hmp_info_pci_device(Monitor *mon, const PciDeviceInfo *dev)
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{
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PciMemoryRegionList *region;
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monitor_printf(mon, " Bus %2" PRId64 ", ", dev->bus);
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monitor_printf(mon, "device %3" PRId64 ", function %" PRId64 ":\n",
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dev->slot, dev->function);
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monitor_printf(mon, " ");
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if (dev->class_info->desc) {
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monitor_puts(mon, dev->class_info->desc);
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} else {
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monitor_printf(mon, "Class %04" PRId64, dev->class_info->q_class);
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}
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monitor_printf(mon, ": PCI device %04" PRIx64 ":%04" PRIx64 "\n",
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dev->id->vendor, dev->id->device);
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if (dev->id->has_subsystem_vendor && dev->id->has_subsystem) {
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monitor_printf(mon, " PCI subsystem %04" PRIx64 ":%04" PRIx64 "\n",
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dev->id->subsystem_vendor, dev->id->subsystem);
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}
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if (dev->has_irq) {
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monitor_printf(mon, " IRQ %" PRId64 ", pin %c\n",
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dev->irq, (char)('A' + dev->irq_pin - 1));
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}
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if (dev->pci_bridge) {
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monitor_printf(mon, " BUS %" PRId64 ".\n",
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dev->pci_bridge->bus->number);
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monitor_printf(mon, " secondary bus %" PRId64 ".\n",
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dev->pci_bridge->bus->secondary);
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monitor_printf(mon, " subordinate bus %" PRId64 ".\n",
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dev->pci_bridge->bus->subordinate);
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monitor_printf(mon, " IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n",
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dev->pci_bridge->bus->io_range->base,
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dev->pci_bridge->bus->io_range->limit);
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monitor_printf(mon,
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" memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n",
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dev->pci_bridge->bus->memory_range->base,
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dev->pci_bridge->bus->memory_range->limit);
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monitor_printf(mon, " prefetchable memory range "
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"[0x%08"PRIx64", 0x%08"PRIx64"]\n",
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dev->pci_bridge->bus->prefetchable_range->base,
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dev->pci_bridge->bus->prefetchable_range->limit);
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}
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for (region = dev->regions; region; region = region->next) {
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uint64_t addr, size;
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addr = region->value->address;
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size = region->value->size;
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monitor_printf(mon, " BAR%" PRId64 ": ", region->value->bar);
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if (!strcmp(region->value->type, "io")) {
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monitor_printf(mon, "I/O at 0x%04" PRIx64
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" [0x%04" PRIx64 "].\n",
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addr, addr + size - 1);
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} else {
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monitor_printf(mon, "%d bit%s memory at 0x%08" PRIx64
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" [0x%08" PRIx64 "].\n",
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region->value->mem_type_64 ? 64 : 32,
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region->value->prefetch ? " prefetchable" : "",
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addr, addr + size - 1);
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}
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}
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monitor_printf(mon, " id \"%s\"\n", dev->qdev_id);
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if (dev->pci_bridge) {
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if (dev->pci_bridge->has_devices) {
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PciDeviceInfoList *cdev;
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for (cdev = dev->pci_bridge->devices; cdev; cdev = cdev->next) {
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hmp_info_pci_device(mon, cdev->value);
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}
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}
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}
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}
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void hmp_info_pci(Monitor *mon, const QDict *qdict)
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{
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PciInfoList *info_list, *info;
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2022-12-01 15:11:24 +03:00
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info_list = qmp_query_pci(&error_abort);
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2022-12-01 15:11:23 +03:00
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for (info = info_list; info; info = info->next) {
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PciDeviceInfoList *dev;
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for (dev = info->value->devices; dev; dev = dev->next) {
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hmp_info_pci_device(mon, dev->value);
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}
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}
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qapi_free_PciInfoList(info_list);
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}
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