2019-01-23 09:56:00 +03:00
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config ACPI
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bool
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config ACPI_X86
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bool
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2019-01-23 09:56:10 +03:00
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select ACPI
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2019-01-23 09:56:16 +03:00
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select ACPI_NVDIMM
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acpi/cxl: Add _OSC implementation (9.14.2)
CXL 2.0 specification adds 2 new dwords to the existing _OSC definition
from PCIe. The new dwords are accessed with a new uuid. This
implementation supports what is in the specification.
iasl -d decodes the result of this patch as:
Name (SUPP, Zero)
Name (CTRL, Zero)
Name (SUPC, Zero)
Name (CTRC, Zero)
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
If (((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */) || (Arg0 == ToUUID ("68f2d50b-c469-4d8a-bd3d-941a103fd3fc") /* Unknown UUID */)))
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
Local0 = CDW3 /* \_SB_.PC0C._OSC.CDW3 */
Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
SUPP = CDW2 /* \_SB_.PC0C._OSC.CDW2 */
CTRL = CDW3 /* \_SB_.PC0C._OSC.CDW3 */
CDW3 = Local0
If ((Arg0 == ToUUID ("68f2d50b-c469-4d8a-bd3d-941a103fd3fc") /* Unknown UUID */))
{
CreateDWordField (Arg3, 0x0C, CDW4)
CreateDWordField (Arg3, 0x10, CDW5)
SUPC = CDW4 /* \_SB_.PC0C._OSC.CDW4 */
CTRC = CDW5 /* \_SB_.PC0C._OSC.CDW5 */
CDW5 |= One
}
Return (Arg3)
}
Else
{
CDW1 |= 0x04
Return (Arg3)
}
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220429144110.25167-25-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-04-29 17:40:49 +03:00
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select ACPI_CXL
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2019-01-23 09:56:16 +03:00
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select ACPI_CPU_HOTPLUG
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select ACPI_MEMORY_HOTPLUG
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2019-12-13 04:19:25 +03:00
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select ACPI_HMAT
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2021-08-12 10:14:09 +03:00
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select ACPI_PIIX4
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select ACPI_PCIHP
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2022-01-28 23:38:04 +03:00
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select ACPI_ERST
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2019-01-23 09:56:00 +03:00
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config ACPI_X86_ICH
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bool
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2019-01-23 09:56:10 +03:00
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select ACPI_X86
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2019-01-23 09:56:00 +03:00
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config ACPI_CPU_HOTPLUG
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bool
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config ACPI_MEMORY_HOTPLUG
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bool
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2019-01-23 09:56:10 +03:00
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select MEM_DEVICE
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2019-01-23 09:56:00 +03:00
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config ACPI_NVDIMM
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bool
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2019-01-23 09:56:16 +03:00
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depends on ACPI
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2019-01-23 09:56:00 +03:00
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2021-08-12 10:14:09 +03:00
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config ACPI_PIIX4
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bool
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depends on ACPI
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config ACPI_PCIHP
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bool
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depends on ACPI
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2019-12-13 04:19:25 +03:00
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config ACPI_HMAT
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bool
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depends on ACPI
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2020-05-12 06:06:03 +03:00
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config ACPI_APEI
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bool
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depends on ACPI
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2019-05-21 09:28:35 +03:00
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config ACPI_PCI
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bool
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depends on ACPI && PCI
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2019-01-23 09:56:00 +03:00
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config ACPI_VMGENID
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bool
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2019-01-23 09:56:16 +03:00
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default y
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depends on PC
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2019-09-18 16:06:25 +03:00
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2021-10-26 21:20:20 +03:00
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config ACPI_VIOT
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bool
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depends on ACPI
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2019-09-18 16:06:25 +03:00
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config ACPI_HW_REDUCED
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2021-05-21 16:53:57 +03:00
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bool
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select ACPI
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select ACPI_MEMORY_HOTPLUG
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select ACPI_NVDIMM
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2022-01-28 23:38:04 +03:00
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config ACPI_ERST
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bool
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default y
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depends on ACPI && PCI
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acpi/cxl: Add _OSC implementation (9.14.2)
CXL 2.0 specification adds 2 new dwords to the existing _OSC definition
from PCIe. The new dwords are accessed with a new uuid. This
implementation supports what is in the specification.
iasl -d decodes the result of this patch as:
Name (SUPP, Zero)
Name (CTRL, Zero)
Name (SUPC, Zero)
Name (CTRC, Zero)
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
If (((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */) || (Arg0 == ToUUID ("68f2d50b-c469-4d8a-bd3d-941a103fd3fc") /* Unknown UUID */)))
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
Local0 = CDW3 /* \_SB_.PC0C._OSC.CDW3 */
Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
SUPP = CDW2 /* \_SB_.PC0C._OSC.CDW2 */
CTRL = CDW3 /* \_SB_.PC0C._OSC.CDW3 */
CDW3 = Local0
If ((Arg0 == ToUUID ("68f2d50b-c469-4d8a-bd3d-941a103fd3fc") /* Unknown UUID */))
{
CreateDWordField (Arg3, 0x0C, CDW4)
CreateDWordField (Arg3, 0x10, CDW5)
SUPC = CDW4 /* \_SB_.PC0C._OSC.CDW4 */
CTRC = CDW5 /* \_SB_.PC0C._OSC.CDW5 */
CDW5 |= One
}
Return (Arg3)
}
Else
{
CDW1 |= 0x04
Return (Arg3)
}
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220429144110.25167-25-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-04-29 17:40:49 +03:00
|
|
|
|
|
|
|
config ACPI_CXL
|
|
|
|
bool
|
|
|
|
depends on ACPI
|