2009-07-02 14:32:06 +04:00
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/*
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* QEMU System Emulator
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*
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* Copyright (c) 2003-2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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2023-08-23 09:53:30 +03:00
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* split out ioport related stuffs from vl.c.
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2009-07-02 14:32:06 +04:00
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*/
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2016-01-29 20:50:05 +03:00
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#include "qemu/osdep.h"
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2016-03-15 18:58:45 +03:00
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#include "cpu.h"
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2012-12-17 21:19:49 +04:00
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#include "exec/ioport.h"
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#include "exec/memory.h"
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2013-06-24 12:45:09 +04:00
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#include "exec/address-spaces.h"
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2020-08-05 16:02:20 +03:00
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#include "trace.h"
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2009-07-02 14:32:06 +04:00
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2023-04-19 18:16:51 +03:00
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struct MemoryRegionPortioList {
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Object obj;
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2013-06-24 12:45:09 +04:00
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MemoryRegion mr;
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void *portio_opaque;
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2023-04-19 18:16:50 +03:00
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MemoryRegionPortio *ports;
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2023-04-19 18:16:51 +03:00
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};
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#define TYPE_MEMORY_REGION_PORTIO_LIST "memory-region-portio-list"
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OBJECT_DECLARE_SIMPLE_TYPE(MemoryRegionPortioList, MEMORY_REGION_PORTIO_LIST)
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2013-06-24 12:45:09 +04:00
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2013-09-02 20:43:30 +04:00
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static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size)
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{
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return -1ULL;
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}
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static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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}
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const MemoryRegionOps unassigned_io_ops = {
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.read = unassigned_io_read,
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.write = unassigned_io_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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2016-03-16 12:20:34 +03:00
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void cpu_outb(uint32_t addr, uint8_t val)
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2009-07-02 14:32:06 +04:00
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{
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2015-10-16 16:08:34 +03:00
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trace_cpu_out(addr, 'b', val);
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2015-04-26 18:49:24 +03:00
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address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
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&val, 1);
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2009-07-02 14:32:06 +04:00
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}
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2016-03-16 12:20:34 +03:00
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void cpu_outw(uint32_t addr, uint16_t val)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[2];
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2015-10-16 16:08:34 +03:00
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trace_cpu_out(addr, 'w', val);
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2013-06-24 12:45:09 +04:00
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stw_p(buf, val);
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2015-04-26 18:49:24 +03:00
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address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
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buf, 2);
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2009-07-02 14:32:06 +04:00
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}
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2016-03-16 12:20:34 +03:00
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void cpu_outl(uint32_t addr, uint32_t val)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[4];
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2015-10-16 16:08:34 +03:00
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trace_cpu_out(addr, 'l', val);
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2013-06-24 12:45:09 +04:00
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stl_p(buf, val);
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2015-04-26 18:49:24 +03:00
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address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
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buf, 4);
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2009-07-02 14:32:06 +04:00
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}
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2016-03-16 12:20:34 +03:00
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uint8_t cpu_inb(uint32_t addr)
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2009-07-02 14:32:06 +04:00
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{
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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uint8_t val;
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2013-06-24 12:45:09 +04:00
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2015-04-26 18:49:24 +03:00
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address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
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&val, 1);
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2015-10-16 16:08:34 +03:00
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trace_cpu_in(addr, 'b', val);
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2009-07-02 14:32:06 +04:00
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return val;
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}
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2016-03-16 12:20:34 +03:00
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uint16_t cpu_inw(uint32_t addr)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[2];
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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uint16_t val;
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2013-06-24 12:45:09 +04:00
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2015-04-26 18:49:24 +03:00
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address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2);
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2013-06-24 12:45:09 +04:00
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val = lduw_p(buf);
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2015-10-16 16:08:34 +03:00
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trace_cpu_in(addr, 'w', val);
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2009-07-02 14:32:06 +04:00
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return val;
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}
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2016-03-16 12:20:34 +03:00
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uint32_t cpu_inl(uint32_t addr)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[4];
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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uint32_t val;
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2013-06-24 12:45:09 +04:00
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2015-04-26 18:49:24 +03:00
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address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 4);
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2013-06-24 12:45:09 +04:00
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val = ldl_p(buf);
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2015-10-16 16:08:34 +03:00
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trace_cpu_in(addr, 'l', val);
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2009-07-02 14:32:06 +04:00
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return val;
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}
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2011-09-26 15:52:26 +04:00
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void portio_list_init(PortioList *piolist,
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2013-06-07 05:19:53 +04:00
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Object *owner,
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2011-09-26 15:52:26 +04:00
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const MemoryRegionPortio *callbacks,
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void *opaque, const char *name)
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{
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unsigned n = 0;
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while (callbacks[n].size) {
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++n;
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}
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piolist->ports = callbacks;
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piolist->nr = 0;
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piolist->regions = g_new0(MemoryRegion *, n);
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piolist->address_space = NULL;
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piolist->opaque = opaque;
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2013-06-07 05:19:53 +04:00
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piolist->owner = owner;
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2011-09-26 15:52:26 +04:00
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piolist->name = name;
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2013-07-02 22:22:37 +04:00
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piolist->flush_coalesced_mmio = false;
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}
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void portio_list_set_flush_coalesced(PortioList *piolist)
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{
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piolist->flush_coalesced_mmio = true;
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2011-09-26 15:52:26 +04:00
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}
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void portio_list_destroy(PortioList *piolist)
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{
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2014-06-11 15:02:51 +04:00
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MemoryRegionPortioList *mrpio;
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unsigned i;
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for (i = 0; i < piolist->nr; ++i) {
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mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
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2014-06-11 14:42:01 +04:00
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object_unparent(OBJECT(&mrpio->mr));
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2023-04-19 18:16:51 +03:00
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object_unref(mrpio);
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2014-06-11 15:02:51 +04:00
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}
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2011-09-26 15:52:26 +04:00
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g_free(piolist->regions);
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}
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2013-06-24 12:45:09 +04:00
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static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio,
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uint64_t offset, unsigned size,
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bool write)
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{
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const MemoryRegionPortio *mrp;
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for (mrp = mrpio->ports; mrp->size; ++mrp) {
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if (offset >= mrp->offset && offset < mrp->offset + mrp->len &&
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size == mrp->size &&
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(write ? (bool)mrp->write : (bool)mrp->read)) {
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return mrp;
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}
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}
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return NULL;
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}
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static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size)
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{
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MemoryRegionPortioList *mrpio = opaque;
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const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false);
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uint64_t data;
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data = ((uint64_t)1 << (size * 8)) - 1;
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if (mrp) {
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data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
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} else if (size == 2) {
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mrp = find_portio(mrpio, addr, 1, false);
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2015-03-30 13:49:40 +03:00
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if (mrp) {
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data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
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if (addr + 1 < mrp->offset + mrp->len) {
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data |= mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8;
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} else {
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data |= 0xff00;
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}
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}
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2013-06-24 12:45:09 +04:00
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}
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return data;
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}
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static void portio_write(void *opaque, hwaddr addr, uint64_t data,
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unsigned size)
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{
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MemoryRegionPortioList *mrpio = opaque;
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const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
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if (mrp) {
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mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
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} else if (size == 2) {
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mrp = find_portio(mrpio, addr, 1, true);
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2015-03-30 13:49:40 +03:00
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if (mrp) {
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mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
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if (addr + 1 < mrp->offset + mrp->len) {
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mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8);
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}
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}
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2013-06-24 12:45:09 +04:00
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}
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}
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static const MemoryRegionOps portio_ops = {
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.read = portio_read,
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.write = portio_write,
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2013-07-22 17:54:25 +04:00
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.endianness = DEVICE_LITTLE_ENDIAN,
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2013-06-24 12:45:09 +04:00
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.valid.unaligned = true,
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.impl.unaligned = true,
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};
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2011-09-26 15:52:26 +04:00
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static void portio_list_add_1(PortioList *piolist,
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const MemoryRegionPortio *pio_init,
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unsigned count, unsigned start,
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unsigned off_low, unsigned off_high)
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{
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2013-06-24 12:45:09 +04:00
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MemoryRegionPortioList *mrpio;
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2023-04-19 18:16:52 +03:00
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Object *owner;
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char *name;
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2011-09-26 15:52:26 +04:00
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unsigned i;
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/* Copy the sub-list and null-terminate it. */
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2023-04-19 18:16:51 +03:00
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mrpio = MEMORY_REGION_PORTIO_LIST(
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object_new(TYPE_MEMORY_REGION_PORTIO_LIST));
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2013-06-24 12:45:09 +04:00
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mrpio->portio_opaque = piolist->opaque;
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2023-04-19 18:16:50 +03:00
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mrpio->ports = g_malloc0(sizeof(MemoryRegionPortio) * (count + 1));
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2013-06-24 12:45:09 +04:00
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memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count);
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memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio));
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2011-09-26 15:52:26 +04:00
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/* Adjust the offsets to all be zero-based for the region. */
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for (i = 0; i < count; ++i) {
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2013-06-24 12:45:09 +04:00
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mrpio->ports[i].offset -= off_low;
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mrpio->ports[i].base = start + off_low;
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2011-09-26 15:52:26 +04:00
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}
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2023-04-19 18:16:52 +03:00
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/*
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* The MemoryRegion owner is the MemoryRegionPortioList since that manages
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* the lifecycle via the refcount
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*/
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memory_region_init_io(&mrpio->mr, OBJECT(mrpio), &portio_ops, mrpio,
|
2013-06-07 05:19:53 +04:00
|
|
|
piolist->name, off_high - off_low);
|
2023-04-19 18:16:52 +03:00
|
|
|
|
|
|
|
/* Reparent the MemoryRegion to the piolist owner */
|
|
|
|
object_ref(&mrpio->mr);
|
|
|
|
object_unparent(OBJECT(&mrpio->mr));
|
|
|
|
if (!piolist->owner) {
|
|
|
|
owner = container_get(qdev_get_machine(), "/unattached");
|
|
|
|
} else {
|
|
|
|
owner = piolist->owner;
|
|
|
|
}
|
|
|
|
name = g_strdup_printf("%s[*]", piolist->name);
|
|
|
|
object_property_add_child(owner, name, OBJECT(&mrpio->mr));
|
|
|
|
g_free(name);
|
|
|
|
|
2013-07-02 22:22:37 +04:00
|
|
|
if (piolist->flush_coalesced_mmio) {
|
|
|
|
memory_region_set_flush_coalesced(&mrpio->mr);
|
|
|
|
}
|
2011-09-26 15:52:26 +04:00
|
|
|
memory_region_add_subregion(piolist->address_space,
|
2013-06-24 12:45:09 +04:00
|
|
|
start + off_low, &mrpio->mr);
|
|
|
|
piolist->regions[piolist->nr] = &mrpio->mr;
|
2012-01-08 21:46:17 +04:00
|
|
|
++piolist->nr;
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void portio_list_add(PortioList *piolist,
|
|
|
|
MemoryRegion *address_space,
|
|
|
|
uint32_t start)
|
|
|
|
{
|
|
|
|
const MemoryRegionPortio *pio, *pio_start = piolist->ports;
|
|
|
|
unsigned int off_low, off_high, off_last, count;
|
|
|
|
|
|
|
|
piolist->address_space = address_space;
|
|
|
|
|
|
|
|
/* Handle the first entry specially. */
|
|
|
|
off_last = off_low = pio_start->offset;
|
2015-03-30 13:35:00 +03:00
|
|
|
off_high = off_low + pio_start->len + pio_start->size - 1;
|
2011-09-26 15:52:26 +04:00
|
|
|
count = 1;
|
|
|
|
|
|
|
|
for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
|
|
|
|
/* All entries must be sorted by offset. */
|
|
|
|
assert(pio->offset >= off_last);
|
|
|
|
off_last = pio->offset;
|
|
|
|
|
|
|
|
/* If we see a hole, break the region. */
|
|
|
|
if (off_last > off_high) {
|
|
|
|
portio_list_add_1(piolist, pio_start, count, start, off_low,
|
|
|
|
off_high);
|
|
|
|
/* ... and start collecting anew. */
|
|
|
|
pio_start = pio;
|
|
|
|
off_low = off_last;
|
2015-03-30 13:35:00 +03:00
|
|
|
off_high = off_low + pio->len + pio_start->size - 1;
|
2011-09-26 15:52:26 +04:00
|
|
|
count = 0;
|
|
|
|
} else if (off_last + pio->len > off_high) {
|
2015-03-30 13:35:00 +03:00
|
|
|
off_high = off_last + pio->len + pio_start->size - 1;
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* There will always be an open sub-list. */
|
|
|
|
portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
|
|
|
|
}
|
|
|
|
|
|
|
|
void portio_list_del(PortioList *piolist)
|
|
|
|
{
|
2013-06-24 12:45:09 +04:00
|
|
|
MemoryRegionPortioList *mrpio;
|
2011-09-26 15:52:26 +04:00
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < piolist->nr; ++i) {
|
2013-06-24 12:45:09 +04:00
|
|
|
mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
|
|
|
|
memory_region_del_subregion(piolist->address_space, &mrpio->mr);
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
}
|
2023-04-19 18:16:51 +03:00
|
|
|
|
|
|
|
static void memory_region_portio_list_finalize(Object *obj)
|
|
|
|
{
|
|
|
|
MemoryRegionPortioList *mrpio = MEMORY_REGION_PORTIO_LIST(obj);
|
|
|
|
|
2023-04-19 18:16:52 +03:00
|
|
|
object_unref(&mrpio->mr);
|
2023-04-19 18:16:51 +03:00
|
|
|
g_free(mrpio->ports);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo memory_region_portio_list_info = {
|
|
|
|
.parent = TYPE_OBJECT,
|
|
|
|
.name = TYPE_MEMORY_REGION_PORTIO_LIST,
|
|
|
|
.instance_size = sizeof(MemoryRegionPortioList),
|
|
|
|
.instance_finalize = memory_region_portio_list_finalize,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void ioport_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&memory_region_portio_list_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(ioport_register_types)
|