2019-09-06 19:20:15 +03:00
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/*
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* QEMU SiFive U OTP (One-Time Programmable) Memory interface
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*
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* Copyright (c) 2019 Bin Meng <bmeng.cn@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_SIFIVE_U_OTP_H
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#define HW_SIFIVE_U_OTP_H
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2022-12-22 15:08:11 +03:00
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#include "hw/sysbus.h"
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2019-09-06 19:20:15 +03:00
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#define SIFIVE_U_OTP_PA 0x00
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#define SIFIVE_U_OTP_PAIO 0x04
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#define SIFIVE_U_OTP_PAS 0x08
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#define SIFIVE_U_OTP_PCE 0x0C
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#define SIFIVE_U_OTP_PCLK 0x10
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#define SIFIVE_U_OTP_PDIN 0x14
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#define SIFIVE_U_OTP_PDOUT 0x18
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#define SIFIVE_U_OTP_PDSTB 0x1C
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#define SIFIVE_U_OTP_PPROG 0x20
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#define SIFIVE_U_OTP_PTC 0x24
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#define SIFIVE_U_OTP_PTM 0x28
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#define SIFIVE_U_OTP_PTM_REP 0x2C
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#define SIFIVE_U_OTP_PTR 0x30
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#define SIFIVE_U_OTP_PTRIM 0x34
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#define SIFIVE_U_OTP_PWE 0x38
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2020-10-20 06:37:31 +03:00
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#define SIFIVE_U_OTP_PWE_EN (1 << 0)
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2019-09-06 19:20:15 +03:00
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#define SIFIVE_U_OTP_PCE_EN (1 << 0)
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#define SIFIVE_U_OTP_PDSTB_EN (1 << 0)
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#define SIFIVE_U_OTP_PTRIM_EN (1 << 0)
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#define SIFIVE_U_OTP_PA_MASK 0xfff
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#define SIFIVE_U_OTP_NUM_FUSES 0x1000
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2020-10-20 06:37:32 +03:00
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#define SIFIVE_U_OTP_FUSE_WORD 4
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2019-09-06 19:20:15 +03:00
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#define SIFIVE_U_OTP_SERIAL_ADDR 0xfc
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#define SIFIVE_U_OTP_REG_SIZE 0x1000
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#define TYPE_SIFIVE_U_OTP "riscv.sifive.u.otp"
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2020-09-01 00:07:30 +03:00
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typedef struct SiFiveUOTPState SiFiveUOTPState;
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2020-09-01 00:07:33 +03:00
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DECLARE_INSTANCE_CHECKER(SiFiveUOTPState, SIFIVE_U_OTP,
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TYPE_SIFIVE_U_OTP)
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2019-09-06 19:20:15 +03:00
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2020-09-01 00:07:30 +03:00
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struct SiFiveUOTPState {
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2019-09-06 19:20:15 +03:00
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion mmio;
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uint32_t pa;
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uint32_t paio;
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uint32_t pas;
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uint32_t pce;
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uint32_t pclk;
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uint32_t pdin;
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uint32_t pdstb;
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uint32_t pprog;
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uint32_t ptc;
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uint32_t ptm;
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uint32_t ptm_rep;
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uint32_t ptr;
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uint32_t ptrim;
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uint32_t pwe;
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uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES];
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2020-10-20 06:37:31 +03:00
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uint32_t fuse_wo[SIFIVE_U_OTP_NUM_FUSES];
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2019-09-06 19:20:15 +03:00
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/* config */
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uint32_t serial;
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2020-10-20 06:37:32 +03:00
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BlockBackend *blk;
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2020-09-01 00:07:30 +03:00
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};
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2019-09-06 19:20:15 +03:00
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#endif /* HW_SIFIVE_U_OTP_H */
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