2012-09-02 11:33:32 +04:00
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/*
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* S/390 condition code helper routines
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2009 Alexander Graf
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "helper.h"
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/* #define DEBUG_HELPER */
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#ifdef DEBUG_HELPER
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#define HELPER_LOG(x...) qemu_log(x)
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#else
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#define HELPER_LOG(x...)
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#endif
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static inline uint32_t cc_calc_ltgt_32(CPUS390XState *env, int32_t src,
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int32_t dst)
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{
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if (src == dst) {
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return 0;
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} else if (src < dst) {
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return 1;
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} else {
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return 2;
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}
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}
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static inline uint32_t cc_calc_ltgt0_32(CPUS390XState *env, int32_t dst)
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{
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return cc_calc_ltgt_32(env, dst, 0);
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}
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static inline uint32_t cc_calc_ltgt_64(CPUS390XState *env, int64_t src,
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int64_t dst)
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{
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if (src == dst) {
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return 0;
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} else if (src < dst) {
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return 1;
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} else {
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return 2;
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}
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}
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static inline uint32_t cc_calc_ltgt0_64(CPUS390XState *env, int64_t dst)
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{
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return cc_calc_ltgt_64(env, dst, 0);
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}
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static inline uint32_t cc_calc_ltugtu_32(CPUS390XState *env, uint32_t src,
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uint32_t dst)
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{
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if (src == dst) {
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return 0;
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} else if (src < dst) {
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return 1;
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} else {
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return 2;
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}
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}
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static inline uint32_t cc_calc_ltugtu_64(CPUS390XState *env, uint64_t src,
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uint64_t dst)
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{
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if (src == dst) {
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return 0;
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} else if (src < dst) {
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return 1;
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} else {
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return 2;
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}
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}
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static inline uint32_t cc_calc_tm_32(CPUS390XState *env, uint32_t val,
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uint32_t mask)
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{
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uint16_t r = val & mask;
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HELPER_LOG("%s: val 0x%x mask 0x%x\n", __func__, val, mask);
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if (r == 0 || mask == 0) {
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return 0;
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} else if (r == mask) {
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return 3;
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} else {
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return 1;
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}
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}
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/* set condition code for test under mask */
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static inline uint32_t cc_calc_tm_64(CPUS390XState *env, uint64_t val,
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uint32_t mask)
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{
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uint16_t r = val & mask;
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HELPER_LOG("%s: val 0x%lx mask 0x%x r 0x%x\n", __func__, val, mask, r);
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if (r == 0 || mask == 0) {
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return 0;
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} else if (r == mask) {
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return 3;
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} else {
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while (!(mask & 0x8000)) {
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mask <<= 1;
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val <<= 1;
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}
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if (val & 0x8000) {
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return 2;
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} else {
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return 1;
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}
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}
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}
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static inline uint32_t cc_calc_nz(CPUS390XState *env, uint64_t dst)
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{
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return !!dst;
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}
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static inline uint32_t cc_calc_add_64(CPUS390XState *env, int64_t a1,
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int64_t a2, int64_t ar)
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{
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if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
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return 3; /* overflow */
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} else {
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if (ar < 0) {
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return 1;
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} else if (ar > 0) {
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return 2;
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} else {
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return 0;
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}
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}
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}
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static inline uint32_t cc_calc_addu_64(CPUS390XState *env, uint64_t a1,
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uint64_t a2, uint64_t ar)
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{
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if (ar == 0) {
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if (a1) {
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return 2;
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} else {
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return 0;
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}
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} else {
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if (ar < a1 || ar < a2) {
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return 3;
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} else {
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return 1;
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}
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}
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}
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static inline uint32_t cc_calc_sub_64(CPUS390XState *env, int64_t a1,
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int64_t a2, int64_t ar)
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{
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if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
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return 3; /* overflow */
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} else {
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if (ar < 0) {
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return 1;
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} else if (ar > 0) {
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return 2;
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} else {
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return 0;
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}
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}
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}
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static inline uint32_t cc_calc_subu_64(CPUS390XState *env, uint64_t a1,
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uint64_t a2, uint64_t ar)
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{
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if (ar == 0) {
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return 2;
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} else {
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if (a2 > a1) {
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return 1;
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} else {
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return 3;
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}
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}
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}
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static inline uint32_t cc_calc_abs_64(CPUS390XState *env, int64_t dst)
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{
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if ((uint64_t)dst == 0x8000000000000000ULL) {
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return 3;
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} else if (dst) {
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return 1;
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} else {
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return 0;
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}
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}
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static inline uint32_t cc_calc_nabs_64(CPUS390XState *env, int64_t dst)
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{
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return !!dst;
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}
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static inline uint32_t cc_calc_comp_64(CPUS390XState *env, int64_t dst)
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{
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if ((uint64_t)dst == 0x8000000000000000ULL) {
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return 3;
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} else if (dst < 0) {
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return 1;
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} else if (dst > 0) {
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return 2;
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} else {
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return 0;
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}
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}
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static inline uint32_t cc_calc_add_32(CPUS390XState *env, int32_t a1,
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int32_t a2, int32_t ar)
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{
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if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
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return 3; /* overflow */
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} else {
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if (ar < 0) {
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return 1;
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} else if (ar > 0) {
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return 2;
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} else {
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return 0;
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}
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}
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}
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static inline uint32_t cc_calc_addu_32(CPUS390XState *env, uint32_t a1,
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uint32_t a2, uint32_t ar)
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{
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if (ar == 0) {
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if (a1) {
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return 2;
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} else {
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return 0;
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}
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} else {
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if (ar < a1 || ar < a2) {
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return 3;
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} else {
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return 1;
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}
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}
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}
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static inline uint32_t cc_calc_sub_32(CPUS390XState *env, int32_t a1,
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int32_t a2, int32_t ar)
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{
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if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
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return 3; /* overflow */
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} else {
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if (ar < 0) {
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return 1;
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} else if (ar > 0) {
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return 2;
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} else {
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return 0;
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}
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}
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}
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static inline uint32_t cc_calc_subu_32(CPUS390XState *env, uint32_t a1,
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uint32_t a2, uint32_t ar)
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{
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if (ar == 0) {
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return 2;
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} else {
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if (a2 > a1) {
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return 1;
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} else {
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return 3;
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}
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}
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}
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static inline uint32_t cc_calc_abs_32(CPUS390XState *env, int32_t dst)
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{
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if ((uint32_t)dst == 0x80000000UL) {
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return 3;
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} else if (dst) {
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return 1;
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} else {
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return 0;
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}
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}
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static inline uint32_t cc_calc_nabs_32(CPUS390XState *env, int32_t dst)
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{
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return !!dst;
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}
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static inline uint32_t cc_calc_comp_32(CPUS390XState *env, int32_t dst)
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{
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if ((uint32_t)dst == 0x80000000UL) {
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return 3;
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} else if (dst < 0) {
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return 1;
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} else if (dst > 0) {
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return 2;
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} else {
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return 0;
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}
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}
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/* calculate condition code for insert character under mask insn */
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static inline uint32_t cc_calc_icm_32(CPUS390XState *env, uint32_t mask,
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uint32_t val)
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{
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uint32_t cc;
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HELPER_LOG("%s: mask 0x%x val %d\n", __func__, mask, val);
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if (mask == 0xf) {
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if (!val) {
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return 0;
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} else if (val & 0x80000000) {
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return 1;
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} else {
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return 2;
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}
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}
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if (!val || !mask) {
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cc = 0;
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} else {
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while (mask != 1) {
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mask >>= 1;
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val >>= 8;
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}
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if (val & 0x80) {
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cc = 1;
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} else {
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cc = 2;
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}
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}
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return cc;
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}
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static inline uint32_t cc_calc_slag(CPUS390XState *env, uint64_t src,
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uint64_t shift)
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{
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uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
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uint64_t match, r;
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/* check if the sign bit stays the same */
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if (src & (1ULL << 63)) {
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match = mask;
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} else {
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match = 0;
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}
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if ((src & mask) != match) {
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/* overflow */
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return 3;
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}
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r = ((src << shift) & ((1ULL << 63) - 1)) | (src & (1ULL << 63));
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if ((int64_t)r == 0) {
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return 0;
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} else if ((int64_t)r < 0) {
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return 1;
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}
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return 2;
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}
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static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
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uint64_t src, uint64_t dst, uint64_t vr)
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{
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uint32_t r = 0;
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switch (cc_op) {
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case CC_OP_CONST0:
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case CC_OP_CONST1:
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case CC_OP_CONST2:
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case CC_OP_CONST3:
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/* cc_op value _is_ cc */
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r = cc_op;
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break;
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case CC_OP_LTGT0_32:
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r = cc_calc_ltgt0_32(env, dst);
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break;
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case CC_OP_LTGT0_64:
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r = cc_calc_ltgt0_64(env, dst);
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break;
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case CC_OP_LTGT_32:
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r = cc_calc_ltgt_32(env, src, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_LTGT_64:
|
|
|
|
r = cc_calc_ltgt_64(env, src, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_LTUGTU_32:
|
|
|
|
r = cc_calc_ltugtu_32(env, src, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_LTUGTU_64:
|
|
|
|
r = cc_calc_ltugtu_64(env, src, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_TM_32:
|
|
|
|
r = cc_calc_tm_32(env, src, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_TM_64:
|
|
|
|
r = cc_calc_tm_64(env, src, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_NZ:
|
|
|
|
r = cc_calc_nz(env, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_ADD_64:
|
|
|
|
r = cc_calc_add_64(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_ADDU_64:
|
|
|
|
r = cc_calc_addu_64(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_SUB_64:
|
|
|
|
r = cc_calc_sub_64(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_SUBU_64:
|
|
|
|
r = cc_calc_subu_64(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_ABS_64:
|
|
|
|
r = cc_calc_abs_64(env, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_NABS_64:
|
|
|
|
r = cc_calc_nabs_64(env, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_COMP_64:
|
|
|
|
r = cc_calc_comp_64(env, dst);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CC_OP_ADD_32:
|
|
|
|
r = cc_calc_add_32(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_ADDU_32:
|
|
|
|
r = cc_calc_addu_32(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_SUB_32:
|
|
|
|
r = cc_calc_sub_32(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_SUBU_32:
|
|
|
|
r = cc_calc_subu_32(env, src, dst, vr);
|
|
|
|
break;
|
|
|
|
case CC_OP_ABS_32:
|
|
|
|
r = cc_calc_abs_64(env, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_NABS_32:
|
|
|
|
r = cc_calc_nabs_64(env, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_COMP_32:
|
|
|
|
r = cc_calc_comp_32(env, dst);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CC_OP_ICM:
|
|
|
|
r = cc_calc_icm_32(env, src, dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_SLAG:
|
|
|
|
r = cc_calc_slag(env, src, dst);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CC_OP_LTGT_F32:
|
2012-09-02 11:33:36 +04:00
|
|
|
r = set_cc_f32(env, src, dst);
|
2012-09-02 11:33:32 +04:00
|
|
|
break;
|
|
|
|
case CC_OP_LTGT_F64:
|
2012-09-02 11:33:36 +04:00
|
|
|
r = set_cc_f64(env, src, dst);
|
2012-09-02 11:33:32 +04:00
|
|
|
break;
|
|
|
|
case CC_OP_NZ_F32:
|
|
|
|
r = set_cc_nz_f32(dst);
|
|
|
|
break;
|
|
|
|
case CC_OP_NZ_F64:
|
|
|
|
r = set_cc_nz_f64(dst);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
cpu_abort(env, "Unknown CC operation: %s\n", cc_name(cc_op));
|
|
|
|
}
|
|
|
|
|
|
|
|
HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
|
|
|
|
cc_name(cc_op), src, dst, vr, r);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst,
|
|
|
|
uint64_t vr)
|
|
|
|
{
|
|
|
|
return do_calc_cc(env, cc_op, src, dst, vr);
|
|
|
|
}
|
|
|
|
|
2012-09-02 11:33:38 +04:00
|
|
|
uint32_t HELPER(calc_cc)(CPUS390XState *env, uint32_t cc_op, uint64_t src,
|
|
|
|
uint64_t dst, uint64_t vr)
|
2012-09-02 11:33:32 +04:00
|
|
|
{
|
|
|
|
return do_calc_cc(env, cc_op, src, dst, vr);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* insert psw mask and condition code into r1 */
|
2012-09-02 11:33:38 +04:00
|
|
|
void HELPER(ipm)(CPUS390XState *env, uint32_t cc, uint32_t r1)
|
2012-09-02 11:33:32 +04:00
|
|
|
{
|
|
|
|
uint64_t r = env->regs[r1];
|
|
|
|
|
|
|
|
r &= 0xffffffff00ffffffULL;
|
|
|
|
r |= (cc << 28) | ((env->psw.mask >> 40) & 0xf);
|
|
|
|
env->regs[r1] = r;
|
|
|
|
HELPER_LOG("%s: cc %d psw.mask 0x%lx r1 0x%lx\n", __func__,
|
|
|
|
cc, env->psw.mask, r);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
2012-09-02 11:33:38 +04:00
|
|
|
void HELPER(load_psw)(CPUS390XState *env, uint64_t mask, uint64_t addr)
|
2012-09-02 11:33:32 +04:00
|
|
|
{
|
|
|
|
load_psw(env, mask, addr);
|
|
|
|
cpu_loop_exit(env);
|
|
|
|
}
|
|
|
|
|
2012-09-02 11:33:38 +04:00
|
|
|
void HELPER(sacf)(CPUS390XState *env, uint64_t a1)
|
2012-09-02 11:33:32 +04:00
|
|
|
{
|
|
|
|
HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1);
|
|
|
|
|
|
|
|
switch (a1 & 0xf00) {
|
|
|
|
case 0x000:
|
|
|
|
env->psw.mask &= ~PSW_MASK_ASC;
|
|
|
|
env->psw.mask |= PSW_ASC_PRIMARY;
|
|
|
|
break;
|
|
|
|
case 0x100:
|
|
|
|
env->psw.mask &= ~PSW_MASK_ASC;
|
|
|
|
env->psw.mask |= PSW_ASC_SECONDARY;
|
|
|
|
break;
|
|
|
|
case 0x300:
|
|
|
|
env->psw.mask &= ~PSW_MASK_ASC;
|
|
|
|
env->psw.mask |= PSW_ASC_HOME;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
qemu_log("unknown sacf mode: %" PRIx64 "\n", a1);
|
|
|
|
program_interrupt(env, PGM_SPECIFICATION, 2);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|