2012-07-04 14:43:33 +04:00
|
|
|
/*
|
|
|
|
* i.MX31 emulation
|
|
|
|
*
|
|
|
|
* Copyright (C) 2012 Peter Chubb
|
|
|
|
* NICTA
|
|
|
|
*
|
|
|
|
* This code is released under the GPL, version 2.0 or later
|
|
|
|
* See the file `../COPYING' for details.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef IMX_H
|
|
|
|
#define IMX_H
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
void imx_serial_create(int uart, const hwaddr addr, qemu_irq irq);
|
2012-07-04 14:43:33 +04:00
|
|
|
|
2012-07-04 14:43:33 +04:00
|
|
|
typedef enum {
|
|
|
|
NOCLK,
|
|
|
|
MCU,
|
|
|
|
HSP,
|
|
|
|
IPG,
|
|
|
|
CLK_32k
|
|
|
|
} IMXClk;
|
|
|
|
|
|
|
|
uint32_t imx_clock_frequency(DeviceState *s, IMXClk clock);
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
void imx_timerp_create(const hwaddr addr,
|
2012-07-04 14:43:33 +04:00
|
|
|
qemu_irq irq,
|
|
|
|
DeviceState *ccm);
|
2012-10-23 14:30:10 +04:00
|
|
|
void imx_timerg_create(const hwaddr addr,
|
2012-07-04 14:43:33 +04:00
|
|
|
qemu_irq irq,
|
|
|
|
DeviceState *ccm);
|
|
|
|
|
|
|
|
|
2012-07-04 14:43:33 +04:00
|
|
|
#endif /* IMX_H */
|