2007-11-17 20:14:51 +03:00
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#ifndef HW_PC_H
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#define HW_PC_H
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2009-03-06 02:01:23 +03:00
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#include "qemu-common.h"
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2012-12-17 21:19:49 +04:00
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#include "exec/memory.h"
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2014-06-10 15:15:17 +04:00
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#include "hw/boards.h"
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2013-02-05 20:06:20 +04:00
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#include "hw/isa/isa.h"
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#include "hw/block/fdc.h"
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2012-10-24 10:43:34 +04:00
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#include "net/net.h"
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2013-02-05 20:06:20 +04:00
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#include "hw/i386/ioapic.h"
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2009-03-06 02:01:23 +03:00
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2013-05-30 13:57:26 +04:00
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#include "qemu/range.h"
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2013-07-24 19:56:09 +04:00
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#include "qemu/bitmap.h"
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#include "sysemu/sysemu.h"
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#include "hw/pci/pci.h"
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2014-06-02 17:24:57 +04:00
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#include "hw/boards.h"
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2014-10-14 20:40:06 +04:00
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#include "hw/compat.h"
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2013-05-30 13:57:26 +04:00
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2013-12-08 13:38:17 +04:00
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#define HPET_INTCAP "hpet-intcap"
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2014-06-02 17:25:08 +04:00
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/**
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* PCMachineState:
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* @hotplug_memory_base: address in guest RAM address space where hotplug memory
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* address space begins.
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* @hotplug_memory: hotplug memory addess space container
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2014-06-02 17:25:24 +04:00
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* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
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2014-10-31 19:38:39 +03:00
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* @enforce_aligned_dimm: check that DIMM's address/size is aligned by
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* backend's alignment value if provided
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2014-06-02 17:25:08 +04:00
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*/
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2014-06-02 17:24:57 +04:00
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struct PCMachineState {
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/*< private >*/
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MachineState parent_obj;
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2014-06-02 17:25:08 +04:00
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/* <public> */
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ram_addr_t hotplug_memory_base;
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MemoryRegion hotplug_memory;
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2014-06-02 17:25:24 +04:00
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HotplugHandler *acpi_dev;
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2014-10-22 07:24:29 +04:00
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ISADevice *rtc;
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2014-06-20 05:40:25 +04:00
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uint64_t max_ram_below_4g;
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2014-11-21 19:18:52 +03:00
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OnOffAuto vmport;
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2014-10-31 19:38:39 +03:00
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bool enforce_aligned_dimm;
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2014-06-02 17:24:57 +04:00
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};
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2014-06-02 17:25:24 +04:00
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#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
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2014-06-02 17:25:27 +04:00
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#define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
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2014-06-20 05:40:25 +04:00
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#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
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2014-10-04 01:33:37 +04:00
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#define PC_MACHINE_VMPORT "vmport"
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2014-10-31 19:38:39 +03:00
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#define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm"
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2014-06-02 17:25:24 +04:00
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2014-06-02 17:25:12 +04:00
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/**
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* PCMachineClass:
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* @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
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*/
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2014-06-02 17:24:57 +04:00
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struct PCMachineClass {
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/*< private >*/
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MachineClass parent_class;
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2014-06-02 17:25:12 +04:00
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/*< public >*/
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HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
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DeviceState *dev);
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2014-06-02 17:24:57 +04:00
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};
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typedef struct PCMachineState PCMachineState;
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typedef struct PCMachineClass PCMachineClass;
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#define TYPE_PC_MACHINE "generic-pc-machine"
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#define PC_MACHINE(obj) \
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OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
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#define PC_MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
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#define PC_MACHINE_CLASS(klass) \
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OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
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2007-11-17 20:14:51 +03:00
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/* PC-style peripherals (also used by other machines). */
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2013-05-30 13:57:26 +04:00
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typedef struct PcPciInfo {
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Range w32;
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Range w64;
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} PcPciInfo;
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2013-09-16 19:09:11 +04:00
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#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
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#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
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#define ACPI_PM_PROP_S4_VAL "s4_val"
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#define ACPI_PM_PROP_SCI_INT "sci_int"
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#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
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#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
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#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
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#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
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#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
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2013-05-30 13:57:26 +04:00
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struct PcGuestInfo {
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2013-08-09 21:35:02 +04:00
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bool isapc_ram_fw;
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2014-01-09 23:12:42 +04:00
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hwaddr ram_size, ram_size_below_4g;
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2013-07-24 19:56:09 +04:00
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unsigned apic_id_limit;
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bool apic_xrupt_override;
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uint64_t numa_nodes;
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uint64_t *node_mem;
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uint64_t *node_cpu;
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2013-05-30 13:57:26 +04:00
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FWCfgState *fw_cfg;
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pc: hack for migration compatibility from QEMU 2.0
Changing the ACPI table size causes migration to break, and the memory
hotplug work opened our eyes on how horribly we were breaking things in
2.0 already.
The ACPI table size is rounded to the next 4k, which one would think
gives some headroom. In practice this is not the case, because the user
can control the ACPI table size (each CPU adds 97 bytes to the SSDT and
8 to the MADT) and so some "-smp" values will break the 4k boundary and
fail to migrate. Similarly, PCI bridges add ~1870 bytes to the SSDT.
This patch concerns itself with fixing migration from QEMU 2.0. It
computes the payload size of QEMU 2.0 and always uses that one.
The previous patch shrunk the ACPI tables enough that the QEMU 2.0 size
should always be enough; non-AML tables can change depending on the
configuration (especially MADT, SRAT, HPET) but they remain the same
between QEMU 2.0 and 2.1, so we only compute our padding based on the
sizes of the SSDT and DSDT.
Migration from QEMU 1.7 should work for guests that have a number of CPUs
other than 12, 13, 14, 54, 55, 56, 97, 98, 139, 140. It was already
broken from QEMU 1.7 to QEMU 2.0 in the same way, though.
Even with this patch, QEMU 1.7 and 2.0 have two different ideas of
"-M pc-i440fx-2.0" when there are PCI bridges. Igor sent a patch to
adopt the QEMU 1.7 definition. I think distributions should apply
it if they move directly from QEMU 1.7 to 2.1+ without ever packaging
version 2.0.
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-07-28 19:34:15 +04:00
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int legacy_acpi_table_size;
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i386: ACPI table generation code from seabios
This adds C code for generating ACPI tables at runtime,
imported from seabios git tree
commit 51684b7ced75fb76776e8ee84833fcfb6ecf12dd
Although ACPI tables come from a system BIOS on real hw,
it makes sense that the ACPI tables are coupled with the
virtual machine, since they have to abstract the x86 machine to
the OS's.
This is widely desired as a way to avoid the churn
and proliferation of QEMU-specific interfaces
associated with ACPI tables in bios code.
Notes:
As BIOS can reprogram devices prior to loading
ACPI tables, we pre-format ACPI tables but defer loading
hardware configuration there until tables are loaded.
The code structure was intentionally kept as close
to the seabios original as possible, to simplify
comparison and making sure we didn't lose anything
in translation.
Minor code duplication results, to help ensure there are no functional
regressions, I think it's better to merge it like this and do more code
changes in follow-up patches.
Cross-version compatibility concerns have been addressed:
ACPI tables are exposed to guest as FW_CFG entries.
When running with -M 1.5 and older, this patch disables ACPI
table generation, and doesn't expose ACPI
tables to guest.
As table content is likely to change over time,
the following measures are taken to simplify
cross-version migration:
- All tables besides the RSDP are packed in a single FW CFG entry.
This entry size is currently 23K. We round it up to 64K
to avoid too much churn there.
- Tables are placed in special ROM blob (not mapped into guest memory)
which is automatically migrated together with the guest, same
as BIOS code.
- Offsets where hardware configuration is loaded in ACPI tables
are also migrated, this is in case future ACPI changes make us
rearrange the tables in memory.
This patch reuses some code from SeaBIOS, which was originally under
LGPLv2 and then relicensed to GPLv3 or LGPLv3, in QEMU under GPLv2+. This
relicensing has been acked by all contributors that had contributed to the
code since the v2->v3 relicense. ACKs approving the v2+ relicensing are
listed below. The list might include ACKs from people not holding
copyright on any parts of the reused code, but it's better to err on the
side of caution and include them.
Affected SeaBIOS files (GPLv2+ license headers added)
<http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/5949>:
src/acpi-dsdt-cpu-hotplug.dsl
src/acpi-dsdt-dbug.dsl
src/acpi-dsdt-hpet.dsl
src/acpi-dsdt-isa.dsl
src/acpi-dsdt-pci-crs.dsl
src/acpi.c
src/acpi.h
src/ssdt-misc.dsl
src/ssdt-pcihp.dsl
src/ssdt-proc.dsl
tools/acpi_extract.py
tools/acpi_extract_preprocess.py
Each one of the listed people agreed to the following:
> If you allow the use of your contribution in QEMU under the
> terms of GPLv2 or later as proposed by this patch,
> please respond to this mail including the line:
>
> Acked-by: Name <email address>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jason Baron <jbaron@akamai.com>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Gleb Natapov <gleb@redhat.com>
Acked-by: Marcelo Tosatti <mtosatti@redhat.com>
Acked-by: Dave Frodin <dave.frodin@se-eng.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Kevin O'Connor <kevin@koconnor.net>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Magnus Christensson <magnus.christensson@intel.com>
Acked-by: Hu Tao <hutao@cn.fujitsu.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-24 19:56:14 +04:00
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bool has_acpi_build;
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2014-06-02 17:25:10 +04:00
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bool has_reserved_memory;
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2015-02-17 12:04:40 +03:00
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bool rsdp_in_ram;
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2013-05-30 13:57:26 +04:00
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};
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2007-11-17 20:14:51 +03:00
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/* parallel.c */
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2015-02-04 20:33:07 +03:00
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void parallel_hds_isa_init(ISABus *bus, int n);
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2011-02-05 17:51:57 +03:00
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2011-10-06 18:44:26 +04:00
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bool parallel_mm_init(MemoryRegion *address_space,
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2012-10-23 14:30:10 +04:00
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hwaddr base, int it_shift, qemu_irq irq,
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2011-02-05 17:51:57 +03:00
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CharDriverState *chr);
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2007-11-17 20:14:51 +03:00
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/* i8259.c */
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2012-01-10 19:31:16 +04:00
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extern DeviceState *isa_pic;
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2011-12-16 01:09:51 +04:00
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qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
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2011-10-16 17:30:27 +04:00
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qemu_irq *kvm_i8259_init(ISABus *bus);
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2012-01-10 19:31:16 +04:00
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int pic_read_irq(DeviceState *d);
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int pic_get_output(DeviceState *d);
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2015-02-06 16:18:24 +03:00
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void hmp_info_pic(Monitor *mon, const QDict *qdict);
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void hmp_info_irq(Monitor *mon, const QDict *qdict);
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2007-11-17 20:14:51 +03:00
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2011-10-07 11:19:35 +04:00
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/* Global System Interrupts */
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2010-06-19 11:41:43 +04:00
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2011-10-07 11:19:35 +04:00
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#define GSI_NUM_PINS IOAPIC_NUM_PINS
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2010-05-14 11:29:15 +04:00
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2011-10-07 11:19:35 +04:00
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typedef struct GSIState {
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2011-10-07 11:19:36 +04:00
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qemu_irq i8259_irq[ISA_NUM_IRQS];
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2011-10-07 11:19:35 +04:00
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
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} GSIState;
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void gsi_handler(void *opaque, int n, int level);
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2010-05-14 11:29:15 +04:00
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2007-11-17 20:14:51 +03:00
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/* vmport.c */
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2013-06-22 10:07:06 +04:00
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typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
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2011-12-16 01:09:51 +04:00
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static inline void vmport_init(ISABus *bus)
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2011-02-05 17:34:41 +03:00
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{
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2011-12-16 01:09:51 +04:00
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isa_create_simple(bus, "vmport");
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2011-02-05 17:34:41 +03:00
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}
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2013-06-22 10:07:06 +04:00
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void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
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2011-02-05 17:34:52 +03:00
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void vmmouse_get_data(uint32_t *data);
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void vmmouse_set_data(const uint32_t *data);
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2007-11-17 20:14:51 +03:00
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/* pckbd.c */
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void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
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void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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2011-08-11 02:28:17 +04:00
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MemoryRegion *region, ram_addr_t size,
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2012-10-23 14:30:10 +04:00
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hwaddr mask);
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2010-05-22 11:59:01 +04:00
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void i8042_isa_mouse_fake_event(void *opaque);
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void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
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2007-11-17 20:14:51 +03:00
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/* pc.c */
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extern int fd_bootchk;
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2010-05-14 11:29:09 +04:00
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void pc_register_ferr_irq(qemu_irq irq);
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2010-05-14 11:29:15 +04:00
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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2013-04-29 20:54:13 +04:00
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void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
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2013-04-30 20:00:53 +04:00
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void pc_hot_add_cpu(const int64_t id, Error **errp);
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2012-12-03 13:47:27 +04:00
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void pc_acpi_init(const char *default_dsdt);
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2013-05-30 13:57:26 +04:00
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PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size);
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2014-08-20 23:58:12 +04:00
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void pc_set_legacy_acpi_data_size(void);
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2013-07-29 18:47:57 +04:00
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#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
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2013-08-27 09:37:26 +04:00
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#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
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2013-07-29 18:47:57 +04:00
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2013-10-29 16:57:34 +04:00
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void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
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MemoryRegion *pci_address_space);
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2013-07-29 18:47:57 +04:00
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2014-07-07 10:34:35 +04:00
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FWCfgState *xen_load_linux(const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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ram_addr_t below_4g_mem_size,
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PcGuestInfo *guest_info);
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2014-06-10 15:15:17 +04:00
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FWCfgState *pc_memory_init(MachineState *machine,
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MemoryRegion *system_memory,
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2013-04-16 04:24:08 +04:00
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ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size,
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MemoryRegion *rom_memory,
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2013-05-30 13:57:26 +04:00
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MemoryRegion **ram_memory,
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PcGuestInfo *guest_info);
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2015-05-29 08:26:59 +03:00
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|
|
qemu_irq pc_allocate_cpu_irq(void);
|
2011-12-16 01:09:51 +04:00
|
|
|
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
|
|
|
|
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
|
2011-05-03 20:06:54 +04:00
|
|
|
ISADevice **rtc_state,
|
2015-05-28 23:04:08 +03:00
|
|
|
bool create_fdctrl,
|
2011-10-20 18:37:26 +04:00
|
|
|
ISADevice **floppy,
|
2013-12-08 13:38:17 +04:00
|
|
|
bool no_vmport,
|
|
|
|
uint32 hpet_irqs);
|
2011-12-16 01:09:51 +04:00
|
|
|
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
|
2010-05-14 11:29:15 +04:00
|
|
|
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
|
2014-10-22 07:24:29 +04:00
|
|
|
const char *boot_device, MachineState *machine,
|
2011-10-20 18:37:26 +04:00
|
|
|
ISADevice *floppy, BusState *ide0, BusState *ide1,
|
2011-02-05 19:32:23 +03:00
|
|
|
ISADevice *s);
|
2012-11-15 00:54:01 +04:00
|
|
|
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
|
2010-05-14 11:29:15 +04:00
|
|
|
void pc_pci_device_init(PCIBus *pci_bus);
|
2010-05-14 11:29:09 +04:00
|
|
|
|
2010-05-14 11:29:04 +04:00
|
|
|
typedef void (*cpu_set_smm_t)(int smm, void *arg);
|
|
|
|
|
2012-11-15 00:54:01 +04:00
|
|
|
void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
|
|
|
|
|
2009-06-18 14:57:00 +04:00
|
|
|
/* acpi_piix.c */
|
2010-03-29 23:23:52 +04:00
|
|
|
|
2013-08-03 02:18:51 +04:00
|
|
|
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
|
|
|
|
qemu_irq sci_irq, qemu_irq smi_irq,
|
2015-04-29 16:20:16 +03:00
|
|
|
int kvm_enabled, DeviceState **piix4_pm);
|
2007-11-17 20:14:51 +03:00
|
|
|
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
|
|
|
|
|
2008-12-18 02:28:44 +03:00
|
|
|
/* hpet.c */
|
|
|
|
extern int no_hpet;
|
|
|
|
|
2007-11-17 20:14:51 +03:00
|
|
|
/* piix_pci.c */
|
2009-08-28 17:28:15 +04:00
|
|
|
struct PCII440FXState;
|
|
|
|
typedef struct PCII440FXState PCII440FXState;
|
|
|
|
|
2011-07-26 15:26:19 +04:00
|
|
|
PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
|
2011-12-16 01:09:54 +04:00
|
|
|
ISABus **isa_bus, qemu_irq *pic,
|
2011-08-08 17:09:04 +04:00
|
|
|
MemoryRegion *address_space_mem,
|
|
|
|
MemoryRegion *address_space_io,
|
2011-08-15 18:17:38 +04:00
|
|
|
ram_addr_t ram_size,
|
2013-12-21 06:02:50 +04:00
|
|
|
ram_addr_t below_4g_mem_size,
|
2013-07-29 18:47:57 +04:00
|
|
|
ram_addr_t above_4g_mem_size,
|
2011-08-15 18:17:38 +04:00
|
|
|
MemoryRegion *pci_memory,
|
|
|
|
MemoryRegion *ram_memory);
|
2007-11-17 20:14:51 +03:00
|
|
|
|
2013-07-24 19:56:11 +04:00
|
|
|
PCIBus *find_i440fx(void);
|
2009-08-28 17:28:13 +04:00
|
|
|
/* piix4.c */
|
2008-10-26 16:43:07 +03:00
|
|
|
extern PCIDevice *piix4_dev;
|
2011-12-16 01:09:58 +04:00
|
|
|
int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
|
2007-11-17 20:14:51 +03:00
|
|
|
|
|
|
|
/* vga.c */
|
2008-09-28 04:42:12 +04:00
|
|
|
enum vga_retrace_method {
|
|
|
|
VGA_RETRACE_DUMB,
|
|
|
|
VGA_RETRACE_PRECISE
|
|
|
|
};
|
|
|
|
|
|
|
|
extern enum vga_retrace_method vga_retrace_method;
|
2007-11-17 20:14:51 +03:00
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
int isa_vga_mm_init(hwaddr vram_base,
|
|
|
|
hwaddr ctrl_base, int it_shift,
|
2011-08-15 18:17:37 +04:00
|
|
|
MemoryRegion *address_space);
|
2007-11-17 20:14:51 +03:00
|
|
|
|
|
|
|
/* ne2000.c */
|
2011-12-16 01:09:51 +04:00
|
|
|
static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
|
2011-02-05 18:39:57 +03:00
|
|
|
{
|
2013-06-07 15:49:13 +04:00
|
|
|
DeviceState *dev;
|
|
|
|
ISADevice *isadev;
|
2007-11-17 20:14:51 +03:00
|
|
|
|
2011-02-05 18:39:57 +03:00
|
|
|
qemu_check_nic_model(nd, "ne2k_isa");
|
|
|
|
|
2013-06-07 15:49:13 +04:00
|
|
|
isadev = isa_try_create(bus, "ne2k_isa");
|
|
|
|
if (!isadev) {
|
2011-02-05 18:44:45 +03:00
|
|
|
return false;
|
|
|
|
}
|
2013-06-07 15:49:13 +04:00
|
|
|
dev = DEVICE(isadev);
|
|
|
|
qdev_prop_set_uint32(dev, "iobase", base);
|
|
|
|
qdev_prop_set_uint32(dev, "irq", irq);
|
|
|
|
qdev_set_nic_properties(dev, nd);
|
|
|
|
qdev_init_nofail(dev);
|
2011-02-05 18:44:45 +03:00
|
|
|
return true;
|
2011-02-05 18:39:57 +03:00
|
|
|
}
|
2007-11-17 20:14:51 +03:00
|
|
|
|
2012-02-22 11:18:51 +04:00
|
|
|
/* pc_sysfw.c */
|
2013-08-09 21:35:02 +04:00
|
|
|
void pc_system_firmware_init(MemoryRegion *rom_memory,
|
|
|
|
bool isapc_ram_fw);
|
2012-02-22 11:18:51 +04:00
|
|
|
|
2013-04-26 07:24:46 +04:00
|
|
|
/* pvpanic.c */
|
2013-07-24 19:56:12 +04:00
|
|
|
uint16_t pvpanic_port(void);
|
2013-04-26 07:24:46 +04:00
|
|
|
|
2010-02-15 20:33:46 +03:00
|
|
|
/* e820 types */
|
|
|
|
#define E820_RAM 1
|
|
|
|
#define E820_RESERVED 2
|
|
|
|
#define E820_ACPI 3
|
|
|
|
#define E820_NVS 4
|
|
|
|
#define E820_UNUSABLE 5
|
|
|
|
|
|
|
|
int e820_add_entry(uint64_t, uint64_t, uint32_t);
|
2014-04-23 17:42:36 +04:00
|
|
|
int e820_get_num_entries(void);
|
|
|
|
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
|
2010-02-15 20:33:46 +03:00
|
|
|
|
2015-05-14 21:53:03 +03:00
|
|
|
#define PC_COMPAT_2_3 \
|
|
|
|
HW_COMPAT_2_3
|
|
|
|
|
|
|
|
#define PC_COMPAT_2_2 \
|
|
|
|
PC_COMPAT_2_3 \
|
|
|
|
HW_COMPAT_2_2
|
|
|
|
|
|
|
|
#define PC_COMPAT_2_1 \
|
|
|
|
PC_COMPAT_2_2 \
|
|
|
|
HW_COMPAT_2_1
|
|
|
|
|
2014-05-05 18:52:50 +04:00
|
|
|
#define PC_COMPAT_2_0 \
|
2015-05-14 21:53:03 +03:00
|
|
|
PC_COMPAT_2_1 \
|
2014-05-05 18:52:50 +04:00
|
|
|
{\
|
2014-06-10 18:40:31 +04:00
|
|
|
.driver = "virtio-scsi-pci",\
|
|
|
|
.property = "any_layout",\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
2014-06-02 17:25:20 +04:00
|
|
|
.driver = "PIIX4_PM",\
|
|
|
|
.property = "memory-hotplug-support",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
2014-05-05 18:52:50 +04:00
|
|
|
{\
|
2014-05-05 18:52:51 +04:00
|
|
|
.driver = "apic",\
|
|
|
|
.property = "version",\
|
|
|
|
.value = stringify(0x11),\
|
2014-06-02 17:25:20 +04:00
|
|
|
},\
|
|
|
|
{\
|
2014-05-15 14:42:16 +04:00
|
|
|
.driver = "nec-usb-xhci",\
|
|
|
|
.property = "superspeed-ports-first",\
|
|
|
|
.value = "off",\
|
2014-02-27 05:05:05 +04:00
|
|
|
},\
|
2014-09-09 14:19:43 +04:00
|
|
|
{\
|
|
|
|
.driver = "nec-usb-xhci",\
|
|
|
|
.property = "force-pcie-endcap",\
|
|
|
|
.value = "on",\
|
|
|
|
},\
|
2014-02-27 05:05:05 +04:00
|
|
|
{\
|
|
|
|
.driver = "pci-serial",\
|
|
|
|
.property = "prog_if",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "pci-serial-2x",\
|
2014-06-25 02:57:55 +04:00
|
|
|
.property = "prog_if",\
|
2014-02-27 05:05:05 +04:00
|
|
|
.value = stringify(0),\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "pci-serial-4x",\
|
|
|
|
.property = "prog_if",\
|
|
|
|
.value = stringify(0),\
|
2014-05-20 10:01:44 +04:00
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "virtio-net-pci",\
|
|
|
|
.property = "guest_announce",\
|
|
|
|
.value = "off",\
|
pc: Move q35 compat props to PC_COMPAT_*
For each compat property on PC_Q35_COMPAT_*, there are only two
possibilities:
* If the device is never instantiated when using a machine other than
pc-q35, then the compat property can be safely added to
PC_COMPAT_*;
* If the device can be instantiated when using a machine other than
pc-q35, that means the other machines also need the compat property
to be set.
That means we don't need separate PC_Q35_COMPAT_* macros at all, today.
The hpet.hpet-intcap case is interesting: piix and q35 do have something
that emulates different defaults, but the machine-specific default is
applied _after_ compat_props are applied, by simply checking if the
property is zero (which is the real default on the hpet code).
The hpet.hpet-intcap=0x4 compat property can (should?) be applied to
piix too, because 0x4 was the default on both piix and q35 before the
hpet-intcap property was introduced.
Now, if one day we change the default HPET intcap on one of the PC
machine-types again, we may want to introduce PC_{Q35,I440FX}_COMPAT
macros. But while we don't need that, we can keep the code simple.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-25 06:04:44 +04:00
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "ICH9-LPC",\
|
|
|
|
.property = "memory-hotplug-support",\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = "xio3130-downstream",\
|
|
|
|
.property = COMPAT_PROP_PCP,\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = "ioh3420",\
|
|
|
|
.property = COMPAT_PROP_PCP,\
|
|
|
|
.value = "off",\
|
2015-05-14 21:53:00 +03:00
|
|
|
},
|
2014-05-05 18:52:50 +04:00
|
|
|
|
2013-11-20 10:32:31 +04:00
|
|
|
#define PC_COMPAT_1_7 \
|
2015-05-14 21:53:00 +03:00
|
|
|
PC_COMPAT_2_0 \
|
2013-11-20 10:32:31 +04:00
|
|
|
{\
|
|
|
|
.driver = TYPE_USB_DEVICE,\
|
|
|
|
.property = "msos-desc",\
|
|
|
|
.value = "no",\
|
2013-10-14 19:01:20 +04:00
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "PIIX4_PM",\
|
|
|
|
.property = "acpi-pci-hotplug-with-bridge-support",\
|
|
|
|
.value = "off",\
|
pc: Move q35 compat props to PC_COMPAT_*
For each compat property on PC_Q35_COMPAT_*, there are only two
possibilities:
* If the device is never instantiated when using a machine other than
pc-q35, then the compat property can be safely added to
PC_COMPAT_*;
* If the device can be instantiated when using a machine other than
pc-q35, that means the other machines also need the compat property
to be set.
That means we don't need separate PC_Q35_COMPAT_* macros at all, today.
The hpet.hpet-intcap case is interesting: piix and q35 do have something
that emulates different defaults, but the machine-specific default is
applied _after_ compat_props are applied, by simply checking if the
property is zero (which is the real default on the hpet code).
The hpet.hpet-intcap=0x4 compat property can (should?) be applied to
piix too, because 0x4 was the default on both piix and q35 before the
hpet-intcap property was introduced.
Now, if one day we change the default HPET intcap on one of the PC
machine-types again, we may want to introduce PC_{Q35,I440FX}_COMPAT
macros. But while we don't need that, we can keep the code simple.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-25 06:04:44 +04:00
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "hpet",\
|
|
|
|
.property = HPET_INTCAP,\
|
|
|
|
.value = stringify(4),\
|
2015-05-14 21:53:00 +03:00
|
|
|
},
|
2013-11-20 10:32:31 +04:00
|
|
|
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 20:30:52 +04:00
|
|
|
#define PC_COMPAT_1_6 \
|
2015-05-14 21:53:00 +03:00
|
|
|
PC_COMPAT_1_7 \
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 20:30:52 +04:00
|
|
|
{\
|
|
|
|
.driver = "e1000",\
|
|
|
|
.property = "mitigation",\
|
|
|
|
.value = "off",\
|
2013-09-11 00:48:59 +04:00
|
|
|
},{\
|
|
|
|
.driver = "qemu64-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "qemu32-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(3),\
|
2013-11-06 03:46:27 +04:00
|
|
|
},{\
|
|
|
|
.driver = "i440FX-pcihost",\
|
|
|
|
.property = "short_root_bus",\
|
|
|
|
.value = stringify(1),\
|
|
|
|
},{\
|
|
|
|
.driver = "q35-pcihost",\
|
|
|
|
.property = "short_root_bus",\
|
|
|
|
.value = stringify(1),\
|
2015-05-14 21:53:00 +03:00
|
|
|
},
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 20:30:52 +04:00
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2013-05-28 00:23:54 +04:00
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#define PC_COMPAT_1_5 \
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2015-05-14 21:53:00 +03:00
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PC_COMPAT_1_6 \
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2013-05-28 00:23:54 +04:00
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{\
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.driver = "Conroe-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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2013-05-28 00:23:55 +04:00
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},{\
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.driver = "Conroe-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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2013-05-28 00:23:54 +04:00
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},{\
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.driver = "Penryn-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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2013-05-28 00:23:55 +04:00
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},{\
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.driver = "Penryn-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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2013-05-28 00:23:54 +04:00
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},{\
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.driver = "Nehalem-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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2013-05-28 00:23:55 +04:00
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},{\
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.driver = "Nehalem-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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2013-07-11 17:06:46 +04:00
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},{\
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.driver = "virtio-net-pci",\
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.property = "any_layout",\
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.value = "off",\
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2013-07-27 00:09:36 +04:00
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},{\
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.driver = TYPE_X86_CPU,\
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.property = "pmu",\
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.value = "on",\
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2013-11-06 03:46:27 +04:00
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},{\
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.driver = "i440FX-pcihost",\
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.property = "short_root_bus",\
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.value = stringify(0),\
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},{\
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.driver = "q35-pcihost",\
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.property = "short_root_bus",\
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.value = stringify(0),\
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2015-05-14 21:53:00 +03:00
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},
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2013-05-28 00:23:54 +04:00
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2013-02-08 17:06:15 +04:00
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#define PC_COMPAT_1_4 \
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2015-05-14 21:53:00 +03:00
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PC_COMPAT_1_5 \
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2013-02-08 17:06:15 +04:00
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{\
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.driver = "scsi-hd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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2015-05-14 21:52:58 +03:00
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},{\
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2013-02-08 17:06:15 +04:00
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.driver = "scsi-cd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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2015-05-14 21:52:58 +03:00
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},{\
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2013-02-08 17:06:15 +04:00
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.driver = "scsi-disk",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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2015-05-14 21:52:58 +03:00
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},{\
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2013-02-08 17:06:15 +04:00
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.driver = "ide-hd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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2015-05-14 21:52:58 +03:00
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},{\
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2013-02-08 17:06:15 +04:00
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.driver = "ide-cd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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2015-05-14 21:52:58 +03:00
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},{\
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2013-02-08 17:06:15 +04:00
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.driver = "ide-drive",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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2013-02-26 20:46:11 +04:00
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},{\
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2013-02-08 17:06:15 +04:00
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.driver = "virtio-blk-pci",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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2015-05-14 21:52:58 +03:00
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},{\
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2013-02-27 17:15:31 +04:00
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.driver = "virtio-serial-pci",\
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.property = "vectors",\
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/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
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.value = stringify(0xFFFFFFFF),\
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2013-05-20 12:18:14 +04:00
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},{ \
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.driver = "virtio-net-pci", \
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.property = "ctrl_guest_offloads", \
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.value = "off", \
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2013-02-26 20:46:11 +04:00
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},{\
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.driver = "e1000",\
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.property = "romfile",\
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.value = "pxe-e1000.rom",\
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},{\
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.driver = "ne2k_pci",\
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.property = "romfile",\
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.value = "pxe-ne2k_pci.rom",\
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},{\
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.driver = "pcnet",\
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.property = "romfile",\
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.value = "pxe-pcnet.rom",\
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},{\
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.driver = "rtl8139",\
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.property = "romfile",\
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.value = "pxe-rtl8139.rom",\
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},{\
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.driver = "virtio-net-pci",\
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.property = "romfile",\
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.value = "pxe-virtio.rom",\
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2013-05-01 19:30:51 +04:00
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},{\
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.driver = "486-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(0),\
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2015-05-14 21:53:00 +03:00
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},
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2013-02-08 17:06:15 +04:00
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2015-05-15 20:18:56 +03:00
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static inline void pc_common_machine_options(MachineClass *m)
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2015-05-15 20:18:54 +03:00
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{
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m->default_boot_order = "cad";
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}
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2015-05-15 20:18:56 +03:00
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static inline void pc_default_machine_options(MachineClass *m)
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2015-05-15 20:18:54 +03:00
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{
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pc_common_machine_options(m);
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m->hot_add_cpu = pc_hot_add_cpu;
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m->max_cpus = 255;
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}
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2015-05-15 20:18:55 +03:00
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#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
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2015-05-15 20:18:56 +03:00
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static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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optsfn(mc); \
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mc->name = namestr; \
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mc->init = initfn; \
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} \
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static const TypeInfo pc_machine_type_##suffix = { \
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.name = namestr TYPE_MACHINE_SUFFIX, \
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.parent = TYPE_PC_MACHINE, \
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.class_init = pc_machine_##suffix##_class_init, \
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}; \
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2015-05-15 20:18:53 +03:00
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static void pc_machine_init_##suffix(void) \
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{ \
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2015-05-15 20:18:56 +03:00
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type_register(&pc_machine_type_##suffix); \
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2015-05-15 20:18:53 +03:00
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} \
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machine_init(pc_machine_init_##suffix)
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2015-05-15 20:18:55 +03:00
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#define SET_MACHINE_COMPAT(m, COMPAT) do { \
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static GlobalProperty props[] = { \
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COMPAT \
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{ /* end of list */ } \
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}; \
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(m)->compat_props = props; \
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} while (0)
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2007-11-17 20:14:51 +03:00
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#endif
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