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qemu/default-configs/arm-softmmu.mak

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Add new config-devices.mak for each target We generate config-devices.h from there automatically. We need to do it in main Makefile, because we are going to need a main Makefile for them. Patchworks-ID: 35196 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:02 +04:00
# Default configuration for arm-softmmu
Generate gdbstub-xml.c only when needed First user of new config-devices.mak Patchworks-ID: 35198 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:04 +04:00
PCI config include Split PCI config options into a separate file Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-11-27 00:39:42 +03:00
include pci.mak
make usb devices configurable Leave the core usb devices (usb hub, tablet, mouse, keyboard) enabled unconditionally. Make the other ones configurable. Exceptions: - bluetooth: not qdevified yet, has a vl.c dependency because of that, thus disabling isn't as easy as not linking the object file. - smardcard: ccid-card-emulated depends on that one *and* CONFIG_SMARTCARD_NSS. So it isn't a one-liner and comes as separate patch because of that. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-02-01 13:49:43 +04:00
include usb.mak
vga: make Cirrus ISA device optional Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01 20:33:43 +04:00
CONFIG_VGA=y
Only compile nand when one target uses it Patchworks-ID: 35202 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:08 +04:00
CONFIG_NAND=y
Only compile ecc when one target uses it Patchworks-ID: 35203 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:09 +04:00
CONFIG_ECC=y
Compile serial only once Push TARGET_WORDS_BIGENDIAN dependency to board level. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21 22:47:11 +03:00
CONFIG_SERIAL=y
Split serial-isa into its own config option At present, the core device model code for 8250-like serial ports (serial.c) and the code for serial ports attached to ISA-style legacy IO (serial-isa.c) are both controlled by the CONFIG_SERIAL variable. There are lots and lots of embedded platforms that have 8250-like serial ports but have never had anything resembling ISA legacy IO. Therefore, split serial-isa into its own CONFIG_SERIAL_ISA option so it can be disabled for platforms where it's not appropriate. For now, I enabled CONFIG_SERIAL_ISA in every default-config where CONFIG_SERIAL is enabled, excepting microblaze, or32, and xtensa. As best as I can tell, those platforms never used legacy ISA, and also don't include PCI support (which would allow connection of a PCI->ISA bridge and/or a southbridge including legacy ISA serial ports). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
2016-02-08 03:36:54 +03:00
CONFIG_SERIAL_ISA=y
Only compile ptimer when one target uses it Patchworks-ID: 35207 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:13 +04:00
CONFIG_PTIMER=y
Only compile sd when one target uses it Patchworks-ID: 35208 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:14 +04:00
CONFIG_SD=y
Only compile max7310 when one target uses it Patchworks-ID: 35210 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:15 +04:00
CONFIG_MAX7310=y
Only compile wm8750 when one target uses it Patchworks-ID: 35209 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:16 +04:00
CONFIG_WM8750=y
Only compile twl92230 when one target uses it Patchworks-ID: 35212 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:17 +04:00
CONFIG_TWL92230=y
Only compile tsc2005 when one target uses it Patchworks-ID: 35215 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:18 +04:00
CONFIG_TSC2005=y
Only compile lm832x when one target uses it Patchworks-ID: 35211 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:19 +04:00
CONFIG_LM832X=y
Only compile tmp105 when one target uses it Patchworks-ID: 35214 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:20 +04:00
CONFIG_TMP105=y
hw/misc: add a TMP42{1, 2, 3} device model Largely inspired by the TMP105 temperature sensor, here is a model for the TMP42{1,2,3} temperature sensors. Specs can be found here : http://www.ti.com/lit/gpn/tmp421 Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1496739230-32109-2-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-13 16:56:59 +03:00
CONFIG_TMP421=y
misc: add pca9552 LED blinker model Specs are available here : https://www.nxp.com/docs/en/application-note/AN264.pdf This is a simple model supporting the basic registers for led and GPIO mode. The device also supports two blinking rates but not the model yet. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180530064049.27976-7-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08 15:15:32 +03:00
CONFIG_PCA9552=y
hw: move interrupt controllers to hw/intc/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 19:12:12 +04:00
CONFIG_STELLARIS=y
Only compile stellaris_input when one target uses it Patchworks-ID: 35213 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:21 +04:00
CONFIG_STELLARIS_INPUT=y
hw: move NICs to hw/net/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:33:56 +04:00
CONFIG_STELLARIS_ENET=y
ARM defconfig fix Tix typo in default-configs/arm-softmmu.mak Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-02-24 02:31:53 +03:00
CONFIG_SSD0303=y
CONFIG_SSD0323=y
arm/vexpress: Add proper display connector emulation This adds the SiI9022 (and implicitly EDID I2C) device to the ARM Versatile Express machine, and selects the two I2C devices necessary in the arm-softmmu.mak configuration so everything will build smoothly. I am implementing proper handling of the graphics in the Linux kernel and adding proper emulation of SiI9022 and EDID makes the driver probe as nicely as before, retrieving the resolutions supported by the "QEMU monitor" and overall just working nice. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Message-id: 20180227104903.21353-6-linus.walleij@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-01 14:05:46 +03:00
CONFIG_DDC=y
CONFIG_SII9022=y
Only compile ads7846 when one target uses it Patchworks-ID: 35218 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:24 +04:00
CONFIG_ADS7846=y
Only compile max111x when one target uses it Patchworks-ID: 35219 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:25 +04:00
CONFIG_MAX111X=y
Only compile ssi when one target uses it Patchworks-ID: 35221 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:27 +04:00
CONFIG_SSI=y
Only compile ssi-sd when one target uses it Patchworks-ID: 35220 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-07 04:41:26 +04:00
CONFIG_SSI_SD=y
m25p80: Initial implementation of SPI flash device Added device model for m25p80 style SPI flash family. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-03-26 16:10:59 +04:00
CONFIG_SSI_M25P80=y
Built network devices once Move some generic NICS into libhw, and build them for ARM targets. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-19 19:42:45 +03:00
CONFIG_LAN9118=y
CONFIG_SMC91C111=y
hw/net: add support for Allwinner EMAC Fast Ethernet controller This patch adds support for the Fast Ethernet MAC found on Allwinner SoCs, together with a basic emulation of Realtek RTL8201CP PHY. Since there is no public documentation of the Allwinner controller, the implementation is based on Linux kernel driver. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31 02:02:06 +04:00
CONFIG_ALLWINNER_EMAC=y
i.MX: Add FEC Ethernet Emulator This is based on mcf_fec.c FEC implementation for Coldfire * A generic PHY was added (borrowwed from LAN9118) * The buffer management is also modified as buffers are slightly different between Coldfire and i.MX Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: fb314f8a120aa49f8f6ad886f312c649b484fb5a.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 12:39:30 +03:00
CONFIG_IMX_FEC=y
net: add FTGMAC100 support The FTGMAC100 device is an Ethernet controller with DMA function that can be found on Aspeed SoCs (which include NCSI). It is fully compliant with IEEE 802.3 specification for 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000 Mbps Ethernet and includes Reduced Media Independent Interface (RMII) and Reduced Gigabit Media Independent Interface (RGMII) interfaces. It adopts an AHB bus interface and integrates a link list DMA engine with direct M-Bus accesses for transmitting and receiving packets. It has independent TX/RX fifos, supports half and full duplex (1000 Mbps mode only supports full duplex), flow control for full duplex and backpressure for half duplex. The FTGMAC100 also implements IP, TCP, UDP checksum offloads and supports IEEE 802.1Q VLAN tag insertion and removal. It offers high-priority transmit queue for QoS and CoS applications This model is backed with a RealTek 8211E PHY which is the chip found on the AST2500 EVB. It is complete enough to satisfy two different Linux drivers and a U-Boot driver. Not supported features are : - IEEE 802.1Q VLAN - High Priority Transmit Queue - Wake-On-LAN functions The code is based on the Coldfire Fast Ethernet Controller model. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-04-14 11:35:00 +03:00
CONFIG_FTGMAC100=y
DS1338 RTC Implement MAXIM SD1338 RTC+NVRAM. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-20 03:21:33 +03:00
CONFIG_DS1338=y
Compile pflash_cfi01 only once Push TARGET_WORDS_BIGENDIAN dependency to board level. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-29 23:23:56 +04:00
CONFIG_PFLASH_CFI01=y
Compile pflash_cfi02 only once Push TARGET_WORDS_BIGENDIAN dependency to board level. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-29 23:23:55 +04:00
CONFIG_PFLASH_CFI02=y
hw: make all of hw/ide/ configurable via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:22:39 +04:00
CONFIG_MICRODRIVE=y
hw/usb: Include USB files only if necessary Boards that do not include an USB controller should not provide USB devices. However, when running "qemu-system-s390x -device help" for example, there's still a usb-hub, usb-kbd, usb-mouse and usb-tablet in the list of "supported" devices. Let's fix that by compiling and linking the USB files only if it is really necessary. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-03-17 16:52:54 +03:00
CONFIG_USB=y
hw: make all of hw/usb/ configurable via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:23:23 +04:00
CONFIG_USB_MUSB=y
Make sysbus EHCI devices ARM only by default A number of ARM embedded boards include EHCI USB host controllers which appear as directly mapped devices, rather than sitting on a PCI bus. At present code to emulate such devices is included whenever EHCI support is included. This patch adjusts teh config options to only include them in builds targetting ARM by default. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-02-18 08:01:01 +03:00
CONFIG_USB_EHCI_SYSBUS=y
Create specific config option for "platform-bus" Currently the "platform-bus" device is included for all softmmu builds. This bridge is intended for use on any platforms that require dynamic creation of sysbus devices. However, at present it is used only for the PPC E500 target, with plans for the ARM "virt" target in the immediate future. To avoid a not-very-useful entry appearing in "qemu -device ?" output on other targets, this patch makes a specific config option for platform-bus and enables it (for now) only on ppc configurations which include E500 and on ARM (which always includes the "virt" target). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <1425017077-18487-3-git-send-email-david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-27 09:04:36 +03:00
CONFIG_PLATFORM_BUS=y
hw: make virtio devices configurable via default-configs/ This is only half of the work, because the proxy devices (virtio-*-pci, virtio-*-ccw, etc.) are still included unconditionally. It is still a move in the right direction. Based-on: <20180522194943.24871-1-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-05-22 22:48:22 +03:00
CONFIG_VIRTIO_MMIO=y
arm: Move some ARM devices into libhw Avoids some unnecessary dependencies on cpu.h and prepares for a future armeb-softmmu where most machines would not be built. Defer touching the SoC devices since most have implicit or explicit dependencies on the CPU. Signed-off-by: Andreas Färber <andreas.faerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-13 06:11:12 +04:00
hw: Add lost ARM core again Commit 0434e30afb6175212389811e0b28b948eb3c1e40 accidentally removed the compilation of arm11mpcore.c. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 00:52:50 +04:00
CONFIG_ARM11MPCORE=y
default-configs: Fix A9MP and A15MP config names When individual CONFIG_ switches for the A9MPcore and A15MPcore devices were created, they were inadvertently given incorrect names (CONFIG_ARM9MPCORE and CONFIG_ARM15MPCORE). These CPUs are "Cortex-A9MP" and "Cortex-A15MP", and in particular the ARM9 is a different (rather older) CPU than the Cortex-A9. Rename the CONFIG_ switches to bring them into line with the source file names and CPU names. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1376056215-26391-1-git-send-email-peter.maydell@linaro.org
2013-08-20 17:54:32 +04:00
CONFIG_A9MPCORE=y
CONFIG_A15MPCORE=y
hw: move ARM CPU cores to hw/cpu/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 19:36:44 +04:00
armv7m: Don't put core v7M devices under CONFIG_STELLARIS The NVIC is a core v7M device that exists for all v7M CPUs; put it under a CONFIG_ARM_V7M rather than hiding it under CONFIG_STELLARIS. (We'll use CONFIG_ARM_V7M for the SysTick device too when we split it out of the NVIC.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1487604965-23220-9-git-send-email-peter.maydell@linaro.org
2017-02-20 18:36:02 +03:00
CONFIG_ARM_V7M=y
hw/arm: Use more CONFIG switches for the object files A lot of ARM object files are linked into the executable unconditionally, even though we have corresponding CONFIG switches like CONFIG_PXA2XX or CONFIG_OMAP. We should make sure to use these switches in the Makefile so that the users can disable certain unwanted boards and devices more easily. While we're at it, also add some new switches for the boards that do not have a CONFIG option yet. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1520266949-29817-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 20:09:44 +03:00
CONFIG_NETDUINO2=y
armv7m: Don't put core v7M devices under CONFIG_STELLARIS The NVIC is a core v7M device that exists for all v7M CPUs; put it under a CONFIG_ARM_V7M rather than hiding it under CONFIG_STELLARIS. (We'll use CONFIG_ARM_V7M for the SysTick device too when we split it out of the NVIC.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1487604965-23220-9-git-send-email-peter.maydell@linaro.org
2017-02-20 18:36:02 +03:00
hw: move interrupt controllers to hw/intc/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 19:12:12 +04:00
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_KVM=$(CONFIG_KVM)
arm: Move some ARM devices into libhw Avoids some unnecessary dependencies on cpu.h and prepares for a future armeb-softmmu where most machines would not be built. Defer touching the SoC devices since most have implicit or explicit dependencies on the CPU. Signed-off-by: Andreas Färber <andreas.faerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-13 06:11:12 +04:00
CONFIG_ARM_TIMER=y
hw: move timer devices to hw/timer/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 17:38:25 +04:00
CONFIG_ARM_MPTIMER=y
hw/timer: Introduce ARM A9 Global Timer. The ARM A9 MPCore has a timer that is global to all cores in the cluster. The timer is shared but each core has a private independent comparator and interrupt. Based on version contributed by Francois LEGAL. Signed-off-by: François LEGAL <devel@thom.fr.eu.org> Message-id: 4918e89476b8da916be2964ec41578b50d569a37.1385969450.git.peter.crosthwaite@xilinx.com [PC changes: * New commit message * Re-implemented as single timer model * Fixed backwards counting issue in polled mode * completed VMSD fields * macroified magic numbers (and headerified reg definitions) * split of as device-model-only patch * use bitops for 64 bit register access * Fixed auto increment mode to check condition properly * general cleanup (names/style etc). ] Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [PMM: * minor typo fixes * added missing return after error_setg() * dropped setting dc->no_user = 1 ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 17:24:51 +04:00
CONFIG_A9_GTIMER=y
arm: Move some ARM devices into libhw Avoids some unnecessary dependencies on cpu.h and prepares for a future armeb-softmmu where most machines would not be built. Defer touching the SoC devices since most have implicit or explicit dependencies on the CPU. Signed-off-by: Andreas Färber <andreas.faerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-13 06:11:12 +04:00
CONFIG_PL011=y
CONFIG_PL022=y
CONFIG_PL031=y
CONFIG_PL041=y
CONFIG_PL050=y
CONFIG_PL061=y
CONFIG_PL080=y
CONFIG_PL110=y
CONFIG_PL181=y
CONFIG_PL190=y
CONFIG_PL310=y
pl330: Initial version Device model for Primecell PL330 DMA controller. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Tested-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 098aac26233d7334bed2bca4f06f539638ca6d24.1361853677.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-03-15 20:41:58 +04:00
CONFIG_PL330=y
arm: Move some ARM devices into libhw Avoids some unnecessary dependencies on cpu.h and prepares for a future armeb-softmmu where most machines would not be built. Defer touching the SoC devices since most have implicit or explicit dependencies on the CPU. Signed-off-by: Andreas Färber <andreas.faerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-13 06:11:12 +04:00
CONFIG_CADENCE=y
CONFIG_XGMAC=y
hw: move display devices to hw/display/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:59:04 +04:00
CONFIG_EXYNOS4=y
CONFIG_PXA2XX=y
i2c: Add a CONFIG_I2C master switch to the configuration files The i2c core and the at24c EEPROM should only be compiled and linked on the machines that support i2c. Otherwise it's quite strange to see the at24c-eeprom to be "available" on qemu-system-s390x for example. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1516634853-15883-1-git-send-email-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-22 18:27:33 +03:00
CONFIG_I2C=y
hw: move I2C controllers to hw/i2c/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 16:07:03 +04:00
CONFIG_BITBANG_I2C=y
hw: move display devices to hw/display/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:59:04 +04:00
CONFIG_FRAMEBUFFER=y
hw: move SSI controllers to hw/ssi/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 16:20:08 +04:00
CONFIG_XILINX_SPIPS=y
dma: Add Xilinx Zynq devcfg device model Add a minimal model for the devcfg device which is part of Zynq. This model supports DMA capabilities and interrupt generation. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 83df49d8fa2d203a421ca71620809e4b04754e65.1467053537.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-04 15:06:37 +03:00
CONFIG_ZYNQ_DEVCFG=y
hw: move timer devices to hw/timer/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 17:38:25 +04:00
arm11mpcore: Split off SCU device Inspired by a9scu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-18 22:07:36 +04:00
CONFIG_ARM11SCU=y
hw: move other devices to hw/misc/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-03 20:06:08 +04:00
CONFIG_A9SCU=y
hw/arm: add very initial support for Canon DIGIC SoC DIGIC is Canon Inc.'s name for a family of SoC for digital cameras and camcorders. There is no publicly available specification for DIGIC chips. All information about DIGIC chip internals is based on reverse engineering efforts made by CHDK (http://chdk.wikia.com) and Magic Lantern (http://www.magiclantern.fm) projects contributors. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387188908-754-2-git-send-email-antonynpavlov@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 23:42:36 +04:00
CONFIG_DIGIC=y
hw: move audio devices to hw/audio/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:55:19 +04:00
CONFIG_MARVELL_88W8618=y
hw: move display devices to hw/display/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:59:04 +04:00
CONFIG_OMAP=y
hw: move timer devices to hw/timer/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 17:38:25 +04:00
CONFIG_TSC210X=y
hw: move display devices to hw/display/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:59:04 +04:00
CONFIG_BLIZZARD=y
hw: move block devices to hw/block/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:55:04 +04:00
CONFIG_ONENAND=y
hw: move timer devices to hw/timer/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 17:38:25 +04:00
CONFIG_TUSB6010=y
hw: move char devices to hw/char/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 16:35:34 +04:00
CONFIG_IMX=y
hw: move other devices to hw/misc/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-03 20:06:08 +04:00
CONFIG_MAINSTONE=y
hw/arm/mps2: Implement skeleton mps2-an385 and mps2-an511 board models Model the ARM MPS2/MPS2+ FPGA based development board. The MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger FPGA but is otherwise the same as the 2). Since the CPU itself and most of the devices are in the FPGA, the details of the board as seen by the guest depend significantly on the FPGA image. We model the following FPGA images: "mps2_an385" -- Cortex-M3 as documented in ARM Application Note AN385 "mps2_an511" -- Cortex-M3 'DesignStart' as documented in AN511 They are fairly similar but differ in the details for some peripherals. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500029487-14822-2-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2017-07-17 15:36:08 +03:00
CONFIG_MPS2=y
hw: move other devices to hw/misc/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-03 20:06:08 +04:00
CONFIG_NSERIES=y
bcm2835_mbox: add BCM2835 mailboxes This adds the system mailboxes which are used to communicate with a number of GPU peripherals on Pi/Pi2. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-30 01:50:37 +03:00
CONFIG_RASPI=y
hw: move interrupt controllers to hw/intc/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 19:12:12 +04:00
CONFIG_REALVIEW=y
hw: move display devices to hw/display/, configure via default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:59:04 +04:00
CONFIG_ZAURUS=y
hw: move other devices to hw/misc/, configure with default-configs/ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-03 20:06:08 +04:00
CONFIG_ZYNQ=y
stm32f2xx_timer: Add the stm32f2xx Timer This patch adds the stm32f2xx timers: TIM2, TIM3, TIM4 and TIM5 to QEMU. Signed-off-by: Alistair Francis <alistair@alistair23.me> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 155091a323390f8da3cca496e4c611c493e62a77.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 16:21:05 +03:00
CONFIG_STM32F2XX_TIMER=y
stm32f2xx_USART: Add the stm32f2xx USART Controller This patch adds the stm32f2xx USART controller (UART also uses the same controller). Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 762c6c0d2a41d574932bc4445ec9bfffe6da8798.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 16:21:05 +03:00
CONFIG_STM32F2XX_USART=y
stm32f2xx_SYSCFG: Add the stm32f2xx SYSCFG This patch adds the stm32f2xx System Configuration Controller. This is used to configure what memory is mapped at address 0 (although that is not supported) as well as configure how the EXTI interrupts work (also not supported at the moment). This device is not required for basic examples, but more complex systems will require it (as well as the EXTI device) Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 5d499d7b60b61d5d6dcb310b2e55411b1f53794e.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 16:21:05 +03:00
CONFIG_STM32F2XX_SYSCFG=y
STM32F2xx: Add the ADC device Add the STM32F2xx ADC device. This device randomly generates values on each read. This also includes creating a hw/adc directory. Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 3240e660adaf537f55a63ce06096e844aece8cda.1474742262.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-04 15:28:07 +03:00
CONFIG_STM32F2XX_ADC=y
STM32F2xx: Add the SPI device Add the STM32F2xx SPI device. Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 8197811d5c94f814fa67c6a33ca2f7fd0aa97432.1474742262.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-04 15:28:07 +03:00
CONFIG_STM32F2XX_SPI=y
stm32f205: Add the stm32f205 SoC This patch adds the stm32f205 SoC. This will be used by the Netduino 2 to create a machine. Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 48d509747a1ea0d8a7d5480560495e679990f9d2.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 16:21:06 +03:00
CONFIG_STM32F205_SOC=y
arm: Move some ARM devices into libhw Avoids some unnecessary dependencies on cpu.h and prepares for a future armeb-softmmu where most machines would not be built. Defer touching the SoC devices since most have implicit or explicit dependencies on the CPU. Signed-off-by: Andreas Färber <andreas.faerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-13 06:11:12 +04:00
hw/char/cmsdk-apb-timer: Implement CMSDK APB timer device Implement a model of the simple timer device found in the CMSDK. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-5-git-send-email-peter.maydell@linaro.org
2017-07-17 15:36:08 +03:00
CONFIG_CMSDK_APB_TIMER=y
hw/timer/cmsdk-apb-dualtimer: Implement CMSDK dual timer module The Arm Cortex-M System Design Kit includes a "dual-input timer module" which combines two programmable down-counters. Implement a model of this device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180820141116.9118-4-peter.maydell@linaro.org
2018-08-24 15:17:41 +03:00
CONFIG_CMSDK_APB_DUALTIMER=y
hw/char/cmsdk-apb-uart.c: Implement CMSDK APB UART Implement a model of the simple "APB UART" provided in the Cortex-M System Design Kit (CMSDK). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500029487-14822-3-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2017-07-17 15:36:08 +03:00
CONFIG_CMSDK_APB_UART=y
hw/watchdog/cmsdk_apb_watchdog: Implement CMSDK APB watchdog module The Arm Cortex-M System Design Kit includes a simple watchdog module based on a 32-bit down-counter. Implement this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-20 13:24:33 +03:00
CONFIG_CMSDK_APB_WATCHDOG=y
hw/char/cmsdk-apb-uart.c: Implement CMSDK APB UART Implement a model of the simple "APB UART" provided in the Cortex-M System Design Kit (CMSDK). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500029487-14822-3-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2017-07-17 15:36:08 +03:00
hw/misc/mps2-fpgaio: FPGA control block for MPS2 AN505 The MPS2 AN505 FPGA image includes a "FPGA control block" which is a small set of registers handling LEDs, buttons and some counters. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-14-peter.maydell@linaro.org
2018-03-02 13:45:39 +03:00
CONFIG_MPS2_FPGAIO=y
hw/misc/mps2_scc: Implement MPS2 Serial Communication Controller Implement a model of the Serial Communication Controller (SCC) found in MPS2 FPGA images. The primary purpose of this device is to communicate with the Motherboard Configuration Controller (MCC) which is located on the MPS board itself, outside the FPGA image. This is used for programming the MPS clock generators. The SCC also has some basic ID registers and an output for the board LEDs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-7-git-send-email-peter.maydell@linaro.org
2017-07-17 15:36:08 +03:00
CONFIG_MPS2_SCC=y
hw/misc/tz-mpc.c: Implement the Arm TrustZone Memory Protection Controller Implement the Arm TrustZone Memory Protection Controller, which sits in front of RAM and allows secure software to configure it to either pass through or reject transactions. We implement the MPC as a QEMU IOMMU, which will direct transactions either through to the devices and memory behind it or to a special "never works" AddressSpace if they are blocked. This initial commit implements the skeleton of the device: * it always permits accesses * it doesn't implement most of the registers * it doesn't implement the interrupt or other behaviour for blocked transactions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20180620132032.28865-2-peter.maydell@linaro.org
2018-06-22 15:28:39 +03:00
CONFIG_TZ_MPC=y
hw/misc/tz-msc: Model TrustZone Master Security Controller Implement a model of the TrustZone Master Securtiy Controller, as documented in the Arm CoreLink SIE-200 System IP for Embedded TRM (DDI0571G): https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g The MSC is intended to sit in front of a device which can be a bus master (eg a DMA controller) and programmably gate its transactions. This allows a bus-mastering device to be controlled by non-secure code but still restricted from making accesses to addresses which are secure-only. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180820141116.9118-12-peter.maydell@linaro.org Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-08-24 15:17:43 +03:00
CONFIG_TZ_MSC=y
hw/misc/tz-ppc: Model TrustZone peripheral protection controller Add a model of the TrustZone peripheral protection controller (PPC), which is used to gate transactions to non-TZ-aware peripherals so that secure software can configure them to not be accessible to non-secure software. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-15-peter.maydell@linaro.org
2018-03-02 13:45:39 +03:00
CONFIG_TZ_PPC=y
hw/arm/iotkit: Model Arm IOT Kit Model the Arm IoT Kit documented in http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html The Arm IoT Kit is a subsystem which includes a CPU and some devices, and is intended be extended by adding extra devices to form a complete system. It is used in the MPS2 board's AN505 image for the Cortex-M33. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-19-peter.maydell@linaro.org
2018-03-02 13:45:40 +03:00
CONFIG_IOTKIT=y
hw/misc/iotkit-secctl: Arm IoT Kit security controller initial skeleton The Arm IoT Kit includes a "security controller" which is largely a collection of registers for controlling the PPCs and other bits of glue in the system. This commit provides the initial skeleton of the device, implementing just the ID registers, and a couple of read-only read-as-zero registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-16-peter.maydell@linaro.org
2018-03-02 13:45:39 +03:00
CONFIG_IOTKIT_SECCTL=y
hw/misc/iotkit-sysctl: Implement IoTKit system control element The Arm IoTKit includes a system control element which provides a block of read-only ID registers and a block of read-write control registers. Implement a minimal version of this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180820141116.9118-9-peter.maydell@linaro.org
2018-08-24 15:17:42 +03:00
CONFIG_IOTKIT_SYSCTL=y
hw/misc/iotkit-sysinfo: Implement IoTKit system information block Implement the IoTKit system control element's system information block; this is just a pair of read-only version/config registers, plus the usual PID/CID ID registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180820141116.9118-10-peter.maydell@linaro.org
2018-08-24 15:17:43 +03:00
CONFIG_IOTKIT_SYSINFO=y
hw/misc/tz-ppc: Model TrustZone peripheral protection controller Add a model of the TrustZone peripheral protection controller (PPC), which is used to gate transactions to non-TZ-aware peripherals so that secure software can configure them to not be accessible to non-secure software. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-15-peter.maydell@linaro.org
2018-03-02 13:45:39 +03:00
hw/arm: Use more CONFIG switches for the object files A lot of ARM object files are linked into the executable unconditionally, even though we have corresponding CONFIG switches like CONFIG_PXA2XX or CONFIG_OMAP. We should make sure to use these switches in the Makefile so that the users can disable certain unwanted boards and devices more easily. While we're at it, also add some new switches for the boards that do not have a CONFIG option yet. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1520266949-29817-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 20:09:44 +03:00
CONFIG_VERSATILE=y
arm: Move some ARM devices into libhw Avoids some unnecessary dependencies on cpu.h and prepares for a future armeb-softmmu where most machines would not be built. Defer touching the SoC devices since most have implicit or explicit dependencies on the CPU. Signed-off-by: Andreas Färber <andreas.faerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-13 06:11:12 +04:00
CONFIG_VERSATILE_PCI=y
CONFIG_VERSATILE_I2C=y
hw/sdhci: introduce standard SD host controller Device model for standard SD Host Controller Interface (SDHCI) compliant with version 2.00 of SD association specification. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 22:23:14 +04:00
arm: Add PCIe host bridge in virt machine Now that we have a working "generic" PCIe host bridge driver, we can plug it into ARM's virt machine to always have PCIe available to normal ARM VMs. I've successfully managed to expose a Bochs VGA device, XHCI and an e1000 into an AArch64 VM with this and they all lived happily ever after. Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Claudio Fontana <claudio.fontana@huawei.com> [PMM: Squashed in fix for off-by-one error in bus-range DT property from Laszlo Ersek <lersek@redhat.com>] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-02-13 08:46:08 +03:00
CONFIG_PCI_GENERIC=y
hw/vfio: Add CONFIG switches for calxeda-xgmac and amd-xgbe Both devices seem to be specific to the ARM platform. It's confusing for the users if they show up on other target architectures, too (e.g. when the user runs QEMU with "-device ?" to get a list of supported devices). Thus let's introduce proper configuration switches so that the devices are only compiled and included when they are really required. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2017-02-10 23:12:03 +03:00
CONFIG_VFIO_XGMAC=y
CONFIG_VFIO_AMD_XGBE=y
arm: Add PCIe host bridge in virt machine Now that we have a working "generic" PCIe host bridge driver, we can plug it into ARM's virt machine to always have PCIe available to normal ARM VMs. I've successfully managed to expose a Bochs VGA device, XHCI and an e1000 into an AArch64 VM with this and they all lived happily ever after. Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Claudio Fontana <claudio.fontana@huawei.com> [PMM: Squashed in fix for off-by-one error in bus-range DT property from Laszlo Ersek <lersek@redhat.com>] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-02-13 08:46:08 +03:00
hw/sdhci: introduce standard SD host controller Device model for standard SD Host Controller Interface (SDHCI) compliant with version 2.00 of SD association specification. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 22:23:14 +04:00
CONFIG_SDHCI=y
hw/arm: Use more CONFIG switches for the object files A lot of ARM object files are linked into the executable unconditionally, even though we have corresponding CONFIG switches like CONFIG_PXA2XX or CONFIG_OMAP. We should make sure to use these switches in the Makefile so that the users can disable certain unwanted boards and devices more easily. While we're at it, also add some new switches for the boards that do not have a CONFIG option yet. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1520266949-29817-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 20:09:44 +03:00
CONFIG_INTEGRATOR=y
integrator: fix Linux boot failure by emulating dbg region Commit 9b8c69243 (since reverted) broke the ability to boot the kernel as the value returned by unassigned_mem_read returned non-zero and left the kernel looping forever waiting for it to change (see integrator_led_set in the kernel code). Relying on a varying implementation detail is incorrect anyway so this introduces a basic stub of a memory region for the debug/LED section on the integrator board. Signed-off-by: Alex Bennée <alex@bennee.com> Message-id: 1382451366-9539-1-git-send-email-alex.bennee@linaro.org [PMM: removed three unused fields from struct IntegratorDebugState] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-10-22 18:16:06 +04:00
CONFIG_INTEGRATOR_DEBUG=y
hw/timer: add allwinner a10 timer Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387159292-10436-3-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 23:42:37 +04:00
CONFIG_ALLWINNER_A10_PIT=y
hw/intc: add allwinner A10 interrupt controller Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1387159292-10436-4-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 23:42:38 +04:00
CONFIG_ALLWINNER_A10_PIC=y
hw/arm: add allwinner a10 SoC support Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387159292-10436-5-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 23:42:38 +04:00
CONFIG_ALLWINNER_A10=y
Add specific config options for PCI-E bridges The i82801b11, ioh3420 and xio3130 PCI Express devices are currently included in the build unconditionally. While they could theoretically appear on any target platform with PCI-E, they're pretty unlikely to appear on platforms that aren't Intel derived. Therefore, to avoid presenting unlikely-to-be-relevant devices to the user, add config options to enable these components, and enable them by default only on x86 and arm platforms. (Note that this patch does include these for aarch64, via its inclusion of arm-softmmu.mak). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-Id: <1425017077-18487-2-git-send-email-david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-27 09:04:35 +03:00
i.MX: Add i.MX6 SOC implementation. For now we only support the following devices: * up to 4 Cortex A9 cores * A9 MPCORE (SCU, GIC, TWD) * 5 i.MX UARTs * 2 EPIT timers * 1 GPT timer * 3 I2C controllers * 7 GPIO controllers * 6 SDHC controllers * 5 SPI controllers * 1 CCM device * 1 SRC device * various ROM/RAM areas. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12 15:22:29 +03:00
CONFIG_FSL_IMX6=y
i.MX: Add SOC support for i.MX31 For now we support the following devices: * CPU: ARM1136 * Interrupt Controller: AVIC * CCM * UART x 2 * EPIT x 2 * GPT Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: f146d819594e41568daec42a1d0f440cdfe3df76.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 12:39:30 +03:00
CONFIG_FSL_IMX31=y
i.MX: Add SOC support for i.MX25 For now we support the following devices: * CPU: ARM926 * Interrupt Controller: AVIC * CCM * UART x 5 * EPIT x 2 * GPT x 4 * FEC * I2C x 3 Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 62218bfa90f9101f79098e768c3d58bd92dcb7f3.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 12:39:30 +03:00
CONFIG_FSL_IMX25=y
i.MX: Add i.MX7 SOC implementation. The following interfaces are partially or fully emulated: * up to 2 Cortex A9 cores (SMP works with PSCI) * A7 MPCORE (identical to A15 MPCORE) * 4 GPTs modules * 7 GPIO controllers * 2 IOMUXC controllers * 1 CCM module * 1 SVNS module * 1 SRC module * 1 GPCv2 controller * 4 eCSPI controllers * 4 I2C controllers * 7 i.MX UART controllers * 2 FlexCAN controllers * 2 Ethernet controllers (FEC) * 3 SD controllers (USDHC) * 4 WDT modules * 1 SDMA module * 1 GPR module * 2 USBMISC modules * 2 ADC modules * 1 PCIe controller Tested to boot and work with upstream Linux (4.13+) guest. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> [PMM: folded a couple of long lines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 20:09:43 +03:00
CONFIG_FSL_IMX7=y
i.MX6UL: Add i.MX6UL SOC Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 3853ec555d68e7e25d726170833b775796151a07.1532984236.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-16 16:05:28 +03:00
CONFIG_FSL_IMX6UL=y
i.MX: Add SOC support for i.MX31 For now we support the following devices: * CPU: ARM1136 * Interrupt Controller: AVIC * CCM * UART x 2 * EPIT x 2 * GPT Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: f146d819594e41568daec42a1d0f440cdfe3df76.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 12:39:30 +03:00
i.MX: Add I2C controller emulator The slave mode is not implemented. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 508dbf2ebe26ec383d3a12a1db5a7890ac8acf20.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 12:39:30 +03:00
CONFIG_IMX_I2C=y
hw/pcie: Introduce a base class for PCI Express Root Ports The 'base' PCI Express Root Port includes the common code to be re-used for all Root Ports implementations. Most of the code was taken from the current implementation of Intel's IOH 3420 Root Port. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-01-23 22:20:18 +03:00
CONFIG_PCIE_PORT=y
Add specific config options for PCI-E bridges The i82801b11, ioh3420 and xio3130 PCI Express devices are currently included in the build unconditionally. While they could theoretically appear on any target platform with PCI-E, they're pretty unlikely to appear on platforms that aren't Intel derived. Therefore, to avoid presenting unlikely-to-be-relevant devices to the user, add config options to enable these components, and enable them by default only on x86 and arm platforms. (Note that this patch does include these for aarch64, via its inclusion of arm-softmmu.mak). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-Id: <1425017077-18487-2-git-send-email-david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-27 09:04:35 +03:00
CONFIG_XIO3130=y
CONFIG_IOH3420=y
CONFIG_I82801B11=y
ACPI: split CONFIG_ACPI into 4 pieces As core.c, piix4.c, ich9.c and pcihp.c are for x86, add CONFIG_ACPI_X86 to make it only for x86. ARM doesn't support cpu and memory hotplug, add CONFIG_ACPI_CPU_HOTPLUG and CONFIG_ACPI_MEMORY_HOTPLUG to exclude them for target-arm. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1432522520-8068-24-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-05-29 13:28:59 +03:00
CONFIG_ACPI=y
smbios: implement smbios support for mach-virt This patch generates smbios tables for ARM mach-virt. Also add CONFIG_SMBIOS=y for ARM default config. Acked-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1440615870-9518-3-git-send-email-wei@redhat.com [PMM: Added missing braces around an if().] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07 12:39:29 +03:00
CONFIG_SMBIOS=y
hw/timer: Add ASPEED timer device model Implement basic ASPEED timer functionality for the AST2400 SoC[1]: Up to 8 timers can independently be configured, enabled, reset and disabled. Some hardware features are not implemented, namely clock value matching and pulse generation, but the implementation is enough to boot the Linux kernel configured with aspeed_defconfig. [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-2-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16 20:06:00 +03:00
CONFIG_ASPEED_SOC=y
hw/gpio: Add the emulation of gpio_key This will be used by ARM virt machine as a power button. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1458221140-15232-2-git-send-email-zhaoshenglong@huawei.com [PMM: Use hyphen rather than underscore in type names; add a comment briefly describing what the device does] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-30 19:27:22 +03:00
CONFIG_GPIO_KEY=y
msf2: Add Smartfusion2 SoC Smartfusion2 SoC has hardened Microcontroller subsystem and flash based FPGA fabric. This patch adds support for Microcontroller subsystem in the SoC. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-5-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type, check m3clk non null] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-20 23:17:36 +03:00
CONFIG_MSF2=y
build-sys: restrict vmcoreinfo to fw_cfg+dma capable targets vmcoreinfo is built for all targets. However, it requires fw_cfg with DMA operations support (write operation). Restrict vmcoreinfo exposure to architectures that are supporting FW_CFG_DMA, that is arm-virt and x86 only atm. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com> Tested-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-11-06 14:53:47 +03:00
CONFIG_FW_CFG_DMA=y
xilinx_spips: Add support for the ZynqMP Generic QSPI Add support for the Zynq Ultrascale MPSoc Generic QSPI. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20171126231634.9531-13-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-13 20:59:22 +03:00
CONFIG_XILINX_AXI=y
pci: Add support for Designware IP block Add code needed to get a functional PCI subsytem when using in conjunction with upstream Linux guest (4.13+). Tested to work against "e1000e" (network adapter, using MSI interrupts) as well as "usb-ehci" (USB controller, using legacy PCI interrupts). Based on "i.MX6 Applications Processor Reference Manual" (Document Number: IMX6DQRM Rev. 4) as well as corresponding dirver in Linux kernel (circa 4.13 - 4.16 found in drivers/pci/dwc/*) Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 20:09:43 +03:00
CONFIG_PCI_DESIGNWARE=y
hw/arm: Use more CONFIG switches for the object files A lot of ARM object files are linked into the executable unconditionally, even though we have corresponding CONFIG switches like CONFIG_PXA2XX or CONFIG_OMAP. We should make sure to use these switches in the Makefile so that the users can disable certain unwanted boards and devices more easily. While we're at it, also add some new switches for the boards that do not have a CONFIG option yet. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1520266949-29817-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 20:09:44 +03:00
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
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