2011-09-06 03:55:55 +04:00
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/*
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "sysemu.h"
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#include "boards.h"
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#include "loader.h"
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#include "elf.h"
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#include "memory.h"
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#include "exec-memory.h"
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static uint64_t translate_phys_addr(void *env, uint64_t addr)
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{
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return cpu_get_phys_page_debug(env, addr);
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}
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2012-05-04 21:28:19 +04:00
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static void sim_reset(void *opaque)
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2011-09-06 03:55:55 +04:00
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{
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2012-05-04 21:28:19 +04:00
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XtensaCPU *cpu = opaque;
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cpu_reset(CPU(cpu));
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2011-09-06 03:55:55 +04:00
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}
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2012-10-25 15:37:52 +04:00
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static void xtensa_sim_init(QEMUMachineInitArgs *args)
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2011-09-06 03:55:55 +04:00
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{
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2012-05-04 21:26:57 +04:00
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XtensaCPU *cpu = NULL;
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2012-03-14 04:38:24 +04:00
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CPUXtensaState *env = NULL;
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2011-09-06 03:55:55 +04:00
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MemoryRegion *ram, *rom;
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2012-10-25 15:37:52 +04:00
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ram_addr_t ram_size = args->ram_size;
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const char *cpu_model = args->cpu_model;
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const char *kernel_filename = args->kernel_filename;
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2011-09-06 03:55:55 +04:00
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int n;
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2012-10-25 15:37:52 +04:00
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if (!cpu_model) {
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cpu_model = XTENSA_DEFAULT_CPU_MODEL;
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}
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2011-09-06 03:55:55 +04:00
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for (n = 0; n < smp_cpus; n++) {
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2012-05-04 21:26:57 +04:00
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cpu = cpu_xtensa_init(cpu_model);
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if (cpu == NULL) {
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2011-09-06 03:55:55 +04:00
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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2012-05-04 21:26:57 +04:00
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env = &cpu->env;
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2011-09-06 03:55:55 +04:00
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env->sregs[PRID] = n;
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2012-05-04 21:28:19 +04:00
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qemu_register_reset(sim_reset, cpu);
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2011-09-06 03:55:55 +04:00
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/* Need MMU initialized prior to ELF loading,
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* so that ELF gets loaded into virtual addresses
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*/
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2012-05-04 21:28:19 +04:00
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sim_reset(cpu);
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2011-09-06 03:55:55 +04:00
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}
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ram = g_malloc(sizeof(*ram));
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2011-12-20 17:59:12 +04:00
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memory_region_init_ram(ram, "xtensa.sram", ram_size);
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vmstate_register_ram_global(ram);
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2011-09-06 03:55:55 +04:00
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memory_region_add_subregion(get_system_memory(), 0, ram);
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rom = g_malloc(sizeof(*rom));
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2011-12-20 17:59:12 +04:00
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memory_region_init_ram(rom, "xtensa.rom", 0x1000);
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vmstate_register_ram_global(rom);
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2011-09-06 03:55:55 +04:00
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memory_region_add_subregion(get_system_memory(), 0xfe000000, rom);
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if (kernel_filename) {
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uint64_t elf_entry;
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uint64_t elf_lowaddr;
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#ifdef TARGET_WORDS_BIGENDIAN
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int success = load_elf(kernel_filename, translate_phys_addr, env,
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&elf_entry, &elf_lowaddr, NULL, 1, ELF_MACHINE, 0);
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#else
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int success = load_elf(kernel_filename, translate_phys_addr, env,
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&elf_entry, &elf_lowaddr, NULL, 0, ELF_MACHINE, 0);
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#endif
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if (success > 0) {
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env->pc = elf_entry;
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}
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}
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}
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2011-10-16 02:56:07 +04:00
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static QEMUMachine xtensa_sim_machine = {
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.name = "sim",
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2012-08-08 14:07:14 +04:00
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.desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")",
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2012-08-09 03:31:38 +04:00
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.is_default = true,
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2011-10-16 02:56:07 +04:00
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.init = xtensa_sim_init,
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2011-09-06 03:55:55 +04:00
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.max_cpus = 4,
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};
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2011-10-16 02:56:07 +04:00
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static void xtensa_sim_machine_init(void)
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2011-09-06 03:55:55 +04:00
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{
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2011-10-16 02:56:07 +04:00
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qemu_register_machine(&xtensa_sim_machine);
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2011-09-06 03:55:55 +04:00
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}
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2011-10-16 02:56:07 +04:00
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machine_init(xtensa_sim_machine_init);
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