qemu/target-ppc/STATUS

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Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
PowerPC emulation status.
The goal of this file is to provide a reference status to avoid regressions.
===============================================================================
PowerPC core emulation status
INSN: instruction set.
OK => all instructions are emulated
KO => some insns are missing or some should be removed
? => unchecked
SPR: special purpose registers set
OK => all SPR registered (but some may be fake)
KO => some SPR are missing or should be removed
? => unchecked
MSR: MSR bits definitions
OK => all MSR bits properly defined
KO => MSR definition is incorrect
? => unchecked
IRQ: input signals definitions (mostly interrupts)
OK => input signals are properly defined
KO => input signals are not implemented (system emulation does not work)
? => input signals definitions may be incorrect
MMU: MMU model implementation
OK => MMU model is implemented and Linux is able to boot
KO => MMU model not implemented or bugged
? => MMU model not tested
EXCP: exceptions model implementation
OK => exception model is implemented and Linux is able to boot
KO => exception model not implemented or known to be buggy
? => exception model may be incorrect or is untested
Embedded PowerPC cores
***
PowerPC 401:
INSN OK
SPR OK 401A1
MSR OK
IRQ KO partially implemented
MMU OK
EXCP ?
PowerPC 401x2:
INSN OK
SPR OK 401B2 401C2 401D2 401E2 401F2
MSR OK
IRQ KO partially implemented
MMU OK
EXCP ?
PowerPC IOP480:
INSN OK
SPR OK IOP480
MSR OK
IRQ KO partially implemented
MMU OK
EXCP ?
To be checked: 401G2 401B3 Cobra
***
PowerPC 403:
INSN OK
SPR OK 403GA 403GB
MMU OK
MSR OK
IRQ KO not implemented
EXCP ?
PowerPC 403GCX:
INSN OK
SPR OK 403GCX
MMU OK
MSR OK
IRQ KO not implemented
EXCP ?
To be checked: 403GC
***
PowerPC 405:
Checked: 405CRa 405CRb 405CRc 405EP 405GPa 405GPb 405GPc 405GPd 405GPe 405GPR
Npe405H Npe405H2 Npe405L
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 boots (at least 1 proprietary firmware).
uboot seems to freeze at boot time.
To be checked: 405D2 405D4 405EZ 405LP Npe4GS3 STB03 STB04 STB25
x2vp4 x2vp7 x2vp20 x2vp50
XXX: find what is IBM e407b4
***
PowerPC 440:
Checked: 440EPa 440EPb 440GXa 440GXb 440GXc 440GXf 440SP 440SP2
INSN OK
SPR OK
MSR OK
IRQ KO not implemented
MMU ?
EXCP ?
PowerPC 440GP:
Checked: 440GPb 440GPc
INSN OK
SPR OK
MSR OK
IRQ KO not implemented
MMU ?
EXCP ?
PowerPC 440x4:
Checked: 440A4 440B4 440G4 440H4
INSN OK
SPR OK
MSR OK
IRQ KO not implemented
MMU ?
EXCP ?
PowerPC 440x5:
Checked: 440A5 440F5 440G5 440H6 440GRa
INSN OK
SPR OK
MSR OK
IRQ KO not implemented
MMU ?
EXCP ?
To be checked: 440EPx 440GRx 440SPE
***
PowerPC 460: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
PowerPC 460F: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
***
PowerPC e200: (not implemented)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
***
PowerPC e300: (not implemented)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
***
PowerPC e500: (not implemented)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
***
PowerPC e600: (not implemented)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
***
32 bits PowerPC
PowerPC 601: (601 601v2)
INSN OK
SPR OK is HID15 only on 601v2 ?
MSR OK
IRQ KO not implemented
MMU ?
EXCP ?
Remarks: some instructions should have a specific behavior (not implemented)
PowerPC 602: 602
INSN OK
SPR OK
MSR OK
IRQ OK
MMU ?
EXCP ? at least timer and external interrupt are OK
Remarks: Linux 2.4 crashes when entering user-mode.
Linux 2.6.22 boots on this CPU but does not recognize it.
PowerPC 603: (603)
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 boots and properly recognizes the CPU
Linux 2.6.22 idem.
PowerPC 603e: (603e11)
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 boots and properly recognizes the CPU
Linux 2.6.22 idem.
PowerPC G2:
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 boots, recognizes the CPU as a 82xx.
Linux 2.6.22 idem.
PowerPC G2le:
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 does not boots. Same symptoms as 602.
Linux 2.6.22 boots and properly recognizes the CPU.
PowerPC 604:
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 boots and properly recognizes the CPU.
Linux 2.6.22 idem.
PowerPC 7x0:
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 boots and properly recognizes the CPU.
Linux 2.6.22 idem.
PowerPC 750fx:
INSN OK
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP OK
Remarks: Linux 2.4 boots but does not properly recognizes the CPU.
Linux 2.6.22 boots and properly recognizes the CPU.
PowerPC 7x5:
INSN ?
SPR ?
MSR ?
IRQ OK
MMU ?
EXCP OK
Remarks: Linux 2.4 does not boot.
Linux 2.6.22 idem.
PowerPC 7400:
INSN KO Altivec missing
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP ? Altivec, ...
Remarks: Linux 2.4 boots and properly recognize the CPU.
Linux 2.6.22 idem.
PowerPC 7410:
INSN KO Altivec missing
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP ? Altivec, ...
Remarks: Linux 2.4 boots and properly recognize the CPU.
Linux 2.6.22 idem.
Note that UM says tlbld & tlbli are implemented but this may be a mistake
as TLB loads are managed by the hardware and the CPU does not implement the
needed registers.
PowerPC 7441:
INSN KO Altivec missing
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP ? Altivec, ...
Remarks: Linux does not have the code to handle TLB miss on this CPU
Linux 2.6.22 idem.
PowerPC 7450/7451:
INSN KO Altivec missing
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP ? Altivec, ...
Remarks: Linux does not have the code to handle TLB miss on this CPU
Linux 2.6.22 idem.
PowerPC 7445/7447:
INSN KO Altivec missing
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP ? Altivec, ...
Remarks: Linux does not have the code to handle TLB miss on this CPU
Linux 2.6.22 idem.
PowerPC 7455/7457:
INSN KO Altivec missing
SPR OK
MSR OK
IRQ OK
MMU OK
EXCP ? Altivec, ...
Remarks: Linux does not have the code to handle TLB miss on this CPU
Linux 2.6.22 idem.
64 bits PowerPC
PowerPC 620: (disabled)
INSN KO
SPR KO
MSR ?
IRQ KO
MMU KO
EXCP KO
Remarks: not much documentation for this implementation...
PowerPC 970:
INSN KO Altivec missing and more
SPR KO
MSR ?
IRQ OK
MMU OK
EXCP KO partially implemented
Remarks: Should be able to boot but there is no hw platform currently emulated.
PowerPC 970FX:
INSN KO Altivec missing and more
SPR KO
MSR ?
IRQ OK
MMU OK
EXCP KO partially implemented
Remarks: Should be able to boot but there is no hw platform currently emulated.
PowerPC Cell:
INSN KO Altivec missing and more
SPR KO
MSR ?
IRQ ?
MMU ?
EXCP ? partially implemented
Remarks: As the core is mostly a 970, should be able to boot.
SPE are not implemented.
PowerPC 630: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
PowerPC 631: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
POWER4: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
POWER4+: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
POWER5: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
POWER5+: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
POWER6: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
RS64: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
RS64-II: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
RS64-III: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
RS64-IV: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
Original POWER
POWER: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
POWER2: (disabled: lack of detailed specifications)
INSN KO
SPR KO
MSR KO
IRQ KO
MMU KO
EXCP KO
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
===============================================================================
PowerPC microcontrollers emulation status
Implemementation should be sufficient to boot Linux:
(there seem to be problems with uboot freezing at some point)
- PowerPC 405CR
- PowerPC 405EP
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
TODO:
- PowerPC 401 microcontrollers emulation
- PowerPC 403 microcontrollers emulation
- more PowerPC 405 microcontrollers emulation
- Fixes / more features for implemented PowerPC 405 microcontrollers emulation
- PowerPC 440 microcontrollers emulation
- e200 microcontrollers emulation
- e300 microcontrollers emulation
- e500 microcontrollers emulation
- e600 microcontrollers emulation
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
===============================================================================
PowerPC based platforms emulation status
* PREP platform (RS/6000 7043...) - TO BE CHECKED (broken)
- Gentoo Linux live CDROM 1.4
- Debian Linux 3.0
- Mandrake Linux 9
* heathrow PowerMac platform (beige PowerMac) - TO BE CHECKED (broken)
- Gentoo Linux live CDROM 1.4
- Debian Linux 3.0
- Mandrake Linux 9
* mac99 platform (white and blue PowerMac, ...)
- Gentoo Linux live CDROM 1.4 - boots, compiles linux kernel
- Debian Linux woody - boots from CDROM and HDD
- Mandrake Linux 9 - boots from CDROM, freezes during install
- Knoppix 2003-07-13_4 boots from CDROM, pb with X configuration
distribution bug: X runs with a properly hand-coded configuration.
- rock Linux 2.0 runs from CDROM
* Linux 2.6 support seems deadly broken (used to boot...).
* PowerPC 405EP reference boards:
- can boot Linux 2.4 & 2.6.
Need to provide a flash image ready to boot for reproductible tests.
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
TODO:
- URGENT: fix PreP and heathrow platforms
- PowerPC 64 reference platform
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
- MCA based RS/6000 emulation
- CHRP emulation (not PowerMac)
- PPAR emulation
- ePPAR emulation
Great PowerPC emulation code resynchronisation and improvments: - Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07 11:32:30 +03:00
- misc PowerPC reference boards emulation
===============================================================================