2012-03-28 17:42:02 +04:00
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/*
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* Test Server
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*
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* Copyright IBM, Corp. 2011
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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2016-01-29 20:50:05 +03:00
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#include "qemu/osdep.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 11:01:28 +03:00
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#include "qapi/error.h"
|
2016-03-15 18:58:45 +03:00
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|
|
#include "cpu.h"
|
2012-12-17 21:20:04 +04:00
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|
|
#include "sysemu/qtest.h"
|
2019-08-12 08:23:59 +03:00
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|
|
#include "sysemu/runstate.h"
|
2017-01-26 17:26:44 +03:00
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|
#include "chardev/char-fe.h"
|
2012-12-17 21:19:49 +04:00
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|
#include "exec/ioport.h"
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|
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#include "exec/memory.h"
|
2012-03-28 17:42:02 +04:00
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|
|
#include "hw/irq.h"
|
2014-09-27 00:45:26 +04:00
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|
|
#include "sysemu/accel.h"
|
2020-08-19 14:17:19 +03:00
|
|
|
#include "sysemu/cpu-timers.h"
|
2014-07-25 13:56:28 +04:00
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|
#include "qemu/config-file.h"
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#include "qemu/option.h"
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|
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#include "qemu/error-report.h"
|
2019-05-23 17:35:07 +03:00
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#include "qemu/module.h"
|
2016-09-13 15:52:43 +03:00
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#include "qemu/cutils.h"
|
2020-02-03 13:42:03 +03:00
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#include CONFIG_DEVICES
|
2020-02-06 02:20:15 +03:00
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#ifdef CONFIG_PSERIES
|
2016-09-13 15:52:45 +03:00
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#include "hw/ppc/spapr_rtas.h"
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#endif
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2012-03-28 17:42:02 +04:00
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#define MAX_IRQ 256
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2013-01-24 09:03:27 +04:00
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bool qtest_allowed;
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2012-03-28 17:42:02 +04:00
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2012-03-28 17:42:03 +04:00
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static DeviceState *irq_intercept_dev;
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2012-03-28 17:42:02 +04:00
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static FILE *qtest_log_fp;
|
2016-10-22 12:52:52 +03:00
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static CharBackend qtest_chr;
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2012-03-28 17:42:02 +04:00
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static GString *inbuf;
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static int irq_levels[MAX_IRQ];
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2012-03-30 23:04:04 +04:00
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static qemu_timeval start_time;
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2012-03-28 17:42:02 +04:00
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static bool qtest_opened;
|
2020-02-20 07:11:01 +03:00
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static void (*qtest_server_send)(void*, const char*);
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static void *qtest_server_send_opaque;
|
2012-03-28 17:42:02 +04:00
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2012-03-30 21:53:54 +04:00
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#define FMT_timeval "%ld.%06ld"
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2012-03-28 17:42:02 +04:00
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/**
|
2020-10-05 23:52:27 +03:00
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* DOC: QTest Protocol
|
2012-03-28 17:42:02 +04:00
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*
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* Line based protocol, request/response based. Server can send async messages
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* so clients should always handle many async messages before the response
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* comes in.
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*
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* Valid requests
|
2020-10-05 23:52:27 +03:00
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* ^^^^^^^^^^^^^^
|
2012-03-28 17:42:02 +04:00
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*
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2012-03-28 17:42:04 +04:00
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* Clock management:
|
2020-10-05 23:52:27 +03:00
|
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* """""""""""""""""
|
2012-03-28 17:42:04 +04:00
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*
|
2013-08-21 19:03:08 +04:00
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* The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
|
2012-03-28 17:42:04 +04:00
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* let you adjust the value of the clock (monotonically). All the commands
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* return the current value of the clock in nanoseconds.
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*
|
2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2012-03-28 17:42:04 +04:00
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* > clock_step
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* < OK VALUE
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*
|
2020-10-05 23:52:27 +03:00
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* Advance the clock to the next deadline. Useful when waiting for
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* asynchronous events.
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*
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* .. code-block:: none
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2012-03-28 17:42:04 +04:00
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*
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* > clock_step NS
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* < OK VALUE
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*
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2020-10-05 23:52:27 +03:00
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* Advance the clock by NS nanoseconds.
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*
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* .. code-block:: none
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2012-03-28 17:42:04 +04:00
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*
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* > clock_set NS
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* < OK VALUE
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*
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2020-10-05 23:52:27 +03:00
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* Advance the clock to NS nanoseconds (do nothing if it's already past).
|
2012-03-28 17:42:04 +04:00
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*
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* PIO and memory access:
|
2020-10-05 23:52:27 +03:00
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* """"""""""""""""""""""
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*
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* .. code-block:: none
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2012-03-28 17:42:04 +04:00
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*
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2012-03-28 17:42:02 +04:00
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* > outb ADDR VALUE
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* < OK
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2012-03-28 17:42:02 +04:00
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* > outw ADDR VALUE
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* < OK
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2012-03-28 17:42:02 +04:00
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* > outl ADDR VALUE
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* < OK
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2012-03-28 17:42:02 +04:00
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* > inb ADDR
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* < OK VALUE
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2012-03-28 17:42:02 +04:00
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* > inw ADDR
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* < OK VALUE
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2012-03-28 17:42:02 +04:00
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* > inl ADDR
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* < OK VALUE
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2013-02-17 01:44:03 +04:00
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* > writeb ADDR VALUE
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* < OK
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2013-02-17 01:44:03 +04:00
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* > writew ADDR VALUE
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* < OK
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2013-02-17 01:44:03 +04:00
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* > writel ADDR VALUE
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* < OK
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*
|
2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2013-02-17 01:44:03 +04:00
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* > writeq ADDR VALUE
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* < OK
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2013-02-17 01:44:03 +04:00
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* > readb ADDR
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* < OK VALUE
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*
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2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
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2013-02-17 01:44:03 +04:00
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* > readw ADDR
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* < OK VALUE
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*
|
2020-10-05 23:52:27 +03:00
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* .. code-block:: none
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*
|
2013-02-17 01:44:03 +04:00
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* > readl ADDR
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* < OK VALUE
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*
|
2020-10-05 23:52:27 +03:00
|
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|
* .. code-block:: none
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|
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|
*
|
2013-02-17 01:44:03 +04:00
|
|
|
* > readq ADDR
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* < OK VALUE
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|
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*
|
2020-10-05 23:52:27 +03:00
|
|
|
* .. code-block:: none
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|
|
|
*
|
2012-03-28 17:42:02 +04:00
|
|
|
* > read ADDR SIZE
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* < OK DATA
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*
|
2020-10-05 23:52:27 +03:00
|
|
|
* .. code-block:: none
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|
|
|
*
|
2012-03-28 17:42:02 +04:00
|
|
|
* > write ADDR SIZE DATA
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* < OK
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*
|
2020-10-05 23:52:27 +03:00
|
|
|
* .. code-block:: none
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|
|
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*
|
2015-05-22 21:13:44 +03:00
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|
* > b64read ADDR SIZE
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* < OK B64_DATA
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*
|
2020-10-05 23:52:27 +03:00
|
|
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* .. code-block:: none
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*
|
2015-05-22 21:13:44 +03:00
|
|
|
* > b64write ADDR SIZE B64_DATA
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* < OK
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*
|
2020-10-05 23:52:27 +03:00
|
|
|
* .. code-block:: none
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*
|
2015-05-22 21:13:44 +03:00
|
|
|
* > memset ADDR SIZE VALUE
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* < OK
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*
|
2012-03-28 17:42:02 +04:00
|
|
|
* ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
|
2016-08-05 13:43:20 +03:00
|
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|
* For 'memset' a zero size is permitted and does nothing.
|
2012-03-28 17:42:02 +04:00
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|
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*
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* DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller
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* than the expected size, the value will be zero filled at the end of the data
|
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|
* sequence.
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*
|
2015-05-22 21:13:44 +03:00
|
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|
* B64_DATA is an arbitrarily long base64 encoded string.
|
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* If the sizes do not match, the data will be truncated.
|
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*
|
2012-03-28 17:42:03 +04:00
|
|
|
* IRQ management:
|
2020-10-05 23:52:27 +03:00
|
|
|
* """""""""""""""
|
|
|
|
*
|
|
|
|
* .. code-block:: none
|
2012-03-28 17:42:03 +04:00
|
|
|
*
|
|
|
|
* > irq_intercept_in QOM-PATH
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* < OK
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*
|
2020-10-05 23:52:27 +03:00
|
|
|
* .. code-block:: none
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|
*
|
2012-03-28 17:42:03 +04:00
|
|
|
* > irq_intercept_out QOM-PATH
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|
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* < OK
|
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|
*
|
|
|
|
* Attach to the gpio-in (resp. gpio-out) pins exported by the device at
|
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|
* QOM-PATH. When the pin is triggered, one of the following async messages
|
2020-10-05 23:52:27 +03:00
|
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|
* will be printed to the qtest stream::
|
2012-03-28 17:42:03 +04:00
|
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*
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* IRQ raise NUM
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* IRQ lower NUM
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*
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* where NUM is an IRQ number. For the PC, interrupts can be intercepted
|
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|
* simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
|
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|
* NUM=0 even though it is remapped to GSI 2).
|
2019-01-07 18:23:47 +03:00
|
|
|
*
|
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|
|
* Setting interrupt level:
|
2020-10-05 23:52:27 +03:00
|
|
|
* """"""""""""""""""""""""
|
|
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|
*
|
|
|
|
* .. code-block:: none
|
2019-01-07 18:23:47 +03:00
|
|
|
*
|
|
|
|
* > set_irq_in QOM-PATH NAME NUM LEVEL
|
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|
|
* < OK
|
|
|
|
*
|
2020-10-05 23:52:27 +03:00
|
|
|
* where NAME is the name of the irq/gpio list, NUM is an IRQ number and
|
|
|
|
* LEVEL is an signed integer IRQ level.
|
2019-01-07 18:23:47 +03:00
|
|
|
*
|
|
|
|
* Forcibly set the given interrupt pin to the given level.
|
|
|
|
*
|
2012-03-28 17:42:02 +04:00
|
|
|
*/
|
|
|
|
|
|
|
|
static int hex2nib(char ch)
|
|
|
|
{
|
|
|
|
if (ch >= '0' && ch <= '9') {
|
|
|
|
return ch - '0';
|
|
|
|
} else if (ch >= 'a' && ch <= 'f') {
|
|
|
|
return 10 + (ch - 'a');
|
|
|
|
} else if (ch >= 'A' && ch <= 'F') {
|
2014-05-27 16:15:20 +04:00
|
|
|
return 10 + (ch - 'A');
|
2012-03-28 17:42:02 +04:00
|
|
|
} else {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-03-30 23:04:04 +04:00
|
|
|
static void qtest_get_time(qemu_timeval *tv)
|
2012-03-28 17:42:02 +04:00
|
|
|
{
|
2012-03-30 23:04:04 +04:00
|
|
|
qemu_gettimeofday(tv);
|
2012-03-28 17:42:02 +04:00
|
|
|
tv->tv_sec -= start_time.tv_sec;
|
|
|
|
tv->tv_usec -= start_time.tv_usec;
|
|
|
|
if (tv->tv_usec < 0) {
|
|
|
|
tv->tv_usec += 1000000;
|
|
|
|
tv->tv_sec -= 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-22 12:52:55 +03:00
|
|
|
static void qtest_send_prefix(CharBackend *chr)
|
2012-03-28 17:42:02 +04:00
|
|
|
{
|
2012-03-30 23:04:04 +04:00
|
|
|
qemu_timeval tv;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
if (!qtest_log_fp || !qtest_opened) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
qtest_get_time(&tv);
|
|
|
|
fprintf(qtest_log_fp, "[S +" FMT_timeval "] ",
|
2013-08-21 00:53:25 +04:00
|
|
|
(long) tv.tv_sec, (long) tv.tv_usec);
|
2012-03-28 17:42:02 +04:00
|
|
|
}
|
|
|
|
|
2015-05-22 21:13:44 +03:00
|
|
|
static void GCC_FMT_ATTR(1, 2) qtest_log_send(const char *fmt, ...)
|
|
|
|
{
|
|
|
|
va_list ap;
|
|
|
|
|
|
|
|
if (!qtest_log_fp || !qtest_opened) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
qtest_send_prefix(NULL);
|
|
|
|
|
|
|
|
va_start(ap, fmt);
|
|
|
|
vfprintf(qtest_log_fp, fmt, ap);
|
|
|
|
va_end(ap);
|
|
|
|
}
|
|
|
|
|
2020-02-20 07:11:01 +03:00
|
|
|
static void qtest_server_char_be_send(void *opaque, const char *str)
|
2015-05-22 21:13:43 +03:00
|
|
|
{
|
2020-02-20 07:11:01 +03:00
|
|
|
size_t len = strlen(str);
|
|
|
|
CharBackend* chr = (CharBackend *)opaque;
|
2015-05-22 21:13:43 +03:00
|
|
|
qemu_chr_fe_write_all(chr, (uint8_t *)str, len);
|
|
|
|
if (qtest_log_fp && qtest_opened) {
|
|
|
|
fprintf(qtest_log_fp, "%s", str);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-22 12:52:55 +03:00
|
|
|
static void qtest_send(CharBackend *chr, const char *str)
|
2015-05-22 21:13:43 +03:00
|
|
|
{
|
2020-02-20 07:11:01 +03:00
|
|
|
qtest_server_send(qtest_server_send_opaque, str);
|
2015-05-22 21:13:43 +03:00
|
|
|
}
|
|
|
|
|
2016-10-22 12:52:55 +03:00
|
|
|
static void GCC_FMT_ATTR(2, 3) qtest_sendf(CharBackend *chr,
|
2015-05-22 21:13:43 +03:00
|
|
|
const char *fmt, ...)
|
2012-03-28 17:42:02 +04:00
|
|
|
{
|
|
|
|
va_list ap;
|
2015-05-22 21:13:43 +03:00
|
|
|
gchar *buffer;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
va_start(ap, fmt);
|
2015-05-22 21:13:43 +03:00
|
|
|
buffer = g_strdup_vprintf(fmt, ap);
|
|
|
|
qtest_send(chr, buffer);
|
2016-11-10 11:25:00 +03:00
|
|
|
g_free(buffer);
|
2012-03-28 17:42:02 +04:00
|
|
|
va_end(ap);
|
|
|
|
}
|
|
|
|
|
2012-03-28 17:42:03 +04:00
|
|
|
static void qtest_irq_handler(void *opaque, int n, int level)
|
|
|
|
{
|
2014-09-26 09:21:31 +04:00
|
|
|
qemu_irq old_irq = *(qemu_irq *)opaque;
|
|
|
|
qemu_set_irq(old_irq, level);
|
2012-03-28 17:42:03 +04:00
|
|
|
|
|
|
|
if (irq_levels[n] != level) {
|
2016-10-22 12:52:55 +03:00
|
|
|
CharBackend *chr = &qtest_chr;
|
2012-03-28 17:42:03 +04:00
|
|
|
irq_levels[n] = level;
|
|
|
|
qtest_send_prefix(chr);
|
2015-05-22 21:13:43 +03:00
|
|
|
qtest_sendf(chr, "IRQ %s %d\n",
|
|
|
|
level ? "raise" : "lower", n);
|
2012-03-28 17:42:03 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-08-19 14:17:19 +03:00
|
|
|
static int64_t qtest_clock_counter;
|
|
|
|
|
|
|
|
int64_t qtest_get_virtual_clock(void)
|
|
|
|
{
|
|
|
|
return qatomic_read_i64(&qtest_clock_counter);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void qtest_set_virtual_clock(int64_t count)
|
|
|
|
{
|
|
|
|
qatomic_set_i64(&qtest_clock_counter, count);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void qtest_clock_warp(int64_t dest)
|
|
|
|
{
|
|
|
|
int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
|
|
|
AioContext *aio_context;
|
|
|
|
assert(qtest_enabled());
|
|
|
|
aio_context = qemu_get_aio_context();
|
|
|
|
while (clock < dest) {
|
|
|
|
int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
|
|
|
|
QEMU_TIMER_ATTR_ALL);
|
|
|
|
int64_t warp = qemu_soonest_timeout(dest - clock, deadline);
|
|
|
|
|
|
|
|
qtest_set_virtual_clock(qtest_get_virtual_clock() + warp);
|
|
|
|
|
|
|
|
qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL);
|
|
|
|
timerlist_run_timers(aio_context->tlg.tl[QEMU_CLOCK_VIRTUAL]);
|
|
|
|
clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
|
|
|
}
|
|
|
|
qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
|
|
|
|
}
|
|
|
|
|
2016-10-22 12:52:55 +03:00
|
|
|
static void qtest_process_command(CharBackend *chr, gchar **words)
|
2012-03-28 17:42:02 +04:00
|
|
|
{
|
|
|
|
const gchar *command;
|
|
|
|
|
|
|
|
g_assert(words);
|
|
|
|
|
|
|
|
command = words[0];
|
|
|
|
|
|
|
|
if (qtest_log_fp) {
|
2012-03-30 23:04:04 +04:00
|
|
|
qemu_timeval tv;
|
2012-03-28 17:42:02 +04:00
|
|
|
int i;
|
|
|
|
|
|
|
|
qtest_get_time(&tv);
|
|
|
|
fprintf(qtest_log_fp, "[R +" FMT_timeval "]",
|
2013-08-21 00:53:25 +04:00
|
|
|
(long) tv.tv_sec, (long) tv.tv_usec);
|
2012-03-28 17:42:02 +04:00
|
|
|
for (i = 0; words[i]; i++) {
|
|
|
|
fprintf(qtest_log_fp, " %s", words[i]);
|
|
|
|
}
|
|
|
|
fprintf(qtest_log_fp, "\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
g_assert(command);
|
2012-03-28 17:42:03 +04:00
|
|
|
if (strcmp(words[0], "irq_intercept_out") == 0
|
|
|
|
|| strcmp(words[0], "irq_intercept_in") == 0) {
|
2014-05-20 10:30:58 +04:00
|
|
|
DeviceState *dev;
|
|
|
|
NamedGPIOList *ngl;
|
2012-03-28 17:42:03 +04:00
|
|
|
|
|
|
|
g_assert(words[1]);
|
|
|
|
dev = DEVICE(object_resolve_path(words[1], NULL));
|
|
|
|
if (!dev) {
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "FAIL Unknown device\n");
|
2018-12-14 01:37:37 +03:00
|
|
|
return;
|
2012-03-28 17:42:03 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (irq_intercept_dev) {
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
if (irq_intercept_dev != dev) {
|
|
|
|
qtest_send(chr, "FAIL IRQ intercept already enabled\n");
|
|
|
|
} else {
|
|
|
|
qtest_send(chr, "OK\n");
|
|
|
|
}
|
2018-12-14 01:37:37 +03:00
|
|
|
return;
|
2012-03-28 17:42:03 +04:00
|
|
|
}
|
|
|
|
|
2014-05-20 10:30:58 +04:00
|
|
|
QLIST_FOREACH(ngl, &dev->gpios, node) {
|
|
|
|
/* We don't support intercept of named GPIOs yet */
|
|
|
|
if (ngl->name) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (words[0][14] == 'o') {
|
2014-09-26 09:21:31 +04:00
|
|
|
int i;
|
|
|
|
for (i = 0; i < ngl->num_out; ++i) {
|
|
|
|
qemu_irq *disconnected = g_new0(qemu_irq, 1);
|
|
|
|
qemu_irq icpt = qemu_allocate_irq(qtest_irq_handler,
|
|
|
|
disconnected, i);
|
|
|
|
|
|
|
|
*disconnected = qdev_intercept_gpio_out(dev, icpt,
|
|
|
|
ngl->name, i);
|
|
|
|
}
|
2014-05-20 10:30:58 +04:00
|
|
|
} else {
|
|
|
|
qemu_irq_intercept_in(ngl->in, qtest_irq_handler,
|
|
|
|
ngl->num_in);
|
|
|
|
}
|
2012-03-28 17:42:03 +04:00
|
|
|
}
|
|
|
|
irq_intercept_dev = dev;
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "OK\n");
|
2019-01-07 18:23:47 +03:00
|
|
|
} else if (strcmp(words[0], "set_irq_in") == 0) {
|
|
|
|
DeviceState *dev;
|
|
|
|
qemu_irq irq;
|
|
|
|
char *name;
|
|
|
|
int ret;
|
|
|
|
int num;
|
|
|
|
int level;
|
|
|
|
|
|
|
|
g_assert(words[1] && words[2] && words[3] && words[4]);
|
2012-03-28 17:42:03 +04:00
|
|
|
|
2019-01-07 18:23:47 +03:00
|
|
|
dev = DEVICE(object_resolve_path(words[1], NULL));
|
|
|
|
if (!dev) {
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "FAIL Unknown device\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (strcmp(words[2], "unnamed-gpio-in") == 0) {
|
|
|
|
name = NULL;
|
|
|
|
} else {
|
|
|
|
name = words[2];
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = qemu_strtoi(words[3], NULL, 0, &num);
|
|
|
|
g_assert(!ret);
|
|
|
|
ret = qemu_strtoi(words[4], NULL, 0, &level);
|
|
|
|
g_assert(!ret);
|
|
|
|
|
|
|
|
irq = qdev_get_gpio_in_named(dev, name, num);
|
|
|
|
|
|
|
|
qemu_set_irq(irq, level);
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "OK\n");
|
2012-03-28 17:42:03 +04:00
|
|
|
} else if (strcmp(words[0], "outb") == 0 ||
|
|
|
|
strcmp(words[0], "outw") == 0 ||
|
|
|
|
strcmp(words[0], "outl") == 0) {
|
2016-09-13 15:52:43 +03:00
|
|
|
unsigned long addr;
|
|
|
|
unsigned long value;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
g_assert(words[1] && words[2]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtoul(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtoul(words[2], NULL, 0, &value);
|
|
|
|
g_assert(ret == 0);
|
2016-09-13 15:52:43 +03:00
|
|
|
g_assert(addr <= 0xffff);
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
if (words[0][3] == 'b') {
|
|
|
|
cpu_outb(addr, value);
|
|
|
|
} else if (words[0][3] == 'w') {
|
|
|
|
cpu_outw(addr, value);
|
|
|
|
} else if (words[0][3] == 'l') {
|
|
|
|
cpu_outl(addr, value);
|
|
|
|
}
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "OK\n");
|
|
|
|
} else if (strcmp(words[0], "inb") == 0 ||
|
|
|
|
strcmp(words[0], "inw") == 0 ||
|
|
|
|
strcmp(words[0], "inl") == 0) {
|
2016-09-13 15:52:43 +03:00
|
|
|
unsigned long addr;
|
2012-03-28 17:42:02 +04:00
|
|
|
uint32_t value = -1U;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
g_assert(words[1]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtoul(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
2016-09-13 15:52:43 +03:00
|
|
|
g_assert(addr <= 0xffff);
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
if (words[0][2] == 'b') {
|
|
|
|
value = cpu_inb(addr);
|
|
|
|
} else if (words[0][2] == 'w') {
|
|
|
|
value = cpu_inw(addr);
|
|
|
|
} else if (words[0][2] == 'l') {
|
|
|
|
value = cpu_inl(addr);
|
|
|
|
}
|
|
|
|
qtest_send_prefix(chr);
|
2015-05-22 21:13:43 +03:00
|
|
|
qtest_sendf(chr, "OK 0x%04x\n", value);
|
2013-02-17 01:44:03 +04:00
|
|
|
} else if (strcmp(words[0], "writeb") == 0 ||
|
|
|
|
strcmp(words[0], "writew") == 0 ||
|
|
|
|
strcmp(words[0], "writel") == 0 ||
|
|
|
|
strcmp(words[0], "writeq") == 0) {
|
|
|
|
uint64_t addr;
|
|
|
|
uint64_t value;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2013-02-17 01:44:03 +04:00
|
|
|
|
|
|
|
g_assert(words[1] && words[2]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtou64(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtou64(words[2], NULL, 0, &value);
|
|
|
|
g_assert(ret == 0);
|
2013-02-17 01:44:03 +04:00
|
|
|
|
|
|
|
if (words[0][5] == 'b') {
|
|
|
|
uint8_t data = value;
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&data, 1);
|
2013-02-17 01:44:03 +04:00
|
|
|
} else if (words[0][5] == 'w') {
|
|
|
|
uint16_t data = value;
|
|
|
|
tswap16s(&data);
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&data, 2);
|
2013-02-17 01:44:03 +04:00
|
|
|
} else if (words[0][5] == 'l') {
|
|
|
|
uint32_t data = value;
|
|
|
|
tswap32s(&data);
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&data, 4);
|
2013-02-17 01:44:03 +04:00
|
|
|
} else if (words[0][5] == 'q') {
|
|
|
|
uint64_t data = value;
|
|
|
|
tswap64s(&data);
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&data, 8);
|
2013-02-17 01:44:03 +04:00
|
|
|
}
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "OK\n");
|
|
|
|
} else if (strcmp(words[0], "readb") == 0 ||
|
|
|
|
strcmp(words[0], "readw") == 0 ||
|
|
|
|
strcmp(words[0], "readl") == 0 ||
|
|
|
|
strcmp(words[0], "readq") == 0) {
|
|
|
|
uint64_t addr;
|
|
|
|
uint64_t value = UINT64_C(-1);
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2013-02-17 01:44:03 +04:00
|
|
|
|
|
|
|
g_assert(words[1]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtou64(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
2013-02-17 01:44:03 +04:00
|
|
|
|
|
|
|
if (words[0][4] == 'b') {
|
|
|
|
uint8_t data;
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&data, 1);
|
2013-02-17 01:44:03 +04:00
|
|
|
value = data;
|
|
|
|
} else if (words[0][4] == 'w') {
|
|
|
|
uint16_t data;
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&data, 2);
|
2013-02-17 01:44:03 +04:00
|
|
|
value = tswap16(data);
|
|
|
|
} else if (words[0][4] == 'l') {
|
|
|
|
uint32_t data;
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&data, 4);
|
2013-02-17 01:44:03 +04:00
|
|
|
value = tswap32(data);
|
|
|
|
} else if (words[0][4] == 'q') {
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
&value, 8);
|
2013-02-17 01:44:03 +04:00
|
|
|
tswap64s(&value);
|
|
|
|
}
|
|
|
|
qtest_send_prefix(chr);
|
2015-05-22 21:13:43 +03:00
|
|
|
qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value);
|
2012-03-28 17:42:02 +04:00
|
|
|
} else if (strcmp(words[0], "read") == 0) {
|
|
|
|
uint64_t addr, len, i;
|
|
|
|
uint8_t *data;
|
2015-05-22 21:13:44 +03:00
|
|
|
char *enc;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
g_assert(words[1] && words[2]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtou64(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtou64(words[2], NULL, 0, &len);
|
|
|
|
g_assert(ret == 0);
|
2017-01-11 11:49:32 +03:00
|
|
|
/* We'd send garbage to libqtest if len is 0 */
|
|
|
|
g_assert(len);
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
data = g_malloc(len);
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
|
|
|
|
len);
|
2012-03-28 17:42:02 +04:00
|
|
|
|
2015-05-22 21:13:44 +03:00
|
|
|
enc = g_malloc(2 * len + 1);
|
2012-03-28 17:42:02 +04:00
|
|
|
for (i = 0; i < len; i++) {
|
2015-05-22 21:13:44 +03:00
|
|
|
sprintf(&enc[i * 2], "%02x", data[i]);
|
2012-03-28 17:42:02 +04:00
|
|
|
}
|
2015-05-22 21:13:44 +03:00
|
|
|
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_sendf(chr, "OK 0x%s\n", enc);
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
g_free(data);
|
2015-05-22 21:13:44 +03:00
|
|
|
g_free(enc);
|
2015-05-22 21:13:44 +03:00
|
|
|
} else if (strcmp(words[0], "b64read") == 0) {
|
|
|
|
uint64_t addr, len;
|
|
|
|
uint8_t *data;
|
|
|
|
gchar *b64_data;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2015-05-22 21:13:44 +03:00
|
|
|
|
|
|
|
g_assert(words[1] && words[2]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtou64(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtou64(words[2], NULL, 0, &len);
|
|
|
|
g_assert(ret == 0);
|
2015-05-22 21:13:44 +03:00
|
|
|
|
|
|
|
data = g_malloc(len);
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
|
|
|
|
len);
|
2015-05-22 21:13:44 +03:00
|
|
|
b64_data = g_base64_encode(data, len);
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_sendf(chr, "OK %s\n", b64_data);
|
|
|
|
|
|
|
|
g_free(data);
|
|
|
|
g_free(b64_data);
|
2012-03-28 17:42:02 +04:00
|
|
|
} else if (strcmp(words[0], "write") == 0) {
|
|
|
|
uint64_t addr, len, i;
|
|
|
|
uint8_t *data;
|
|
|
|
size_t data_len;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
g_assert(words[1] && words[2] && words[3]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtou64(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtou64(words[2], NULL, 0, &len);
|
|
|
|
g_assert(ret == 0);
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
data_len = strlen(words[3]);
|
|
|
|
if (data_len < 3) {
|
|
|
|
qtest_send(chr, "ERR invalid argument size\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
data = g_malloc(len);
|
|
|
|
for (i = 0; i < len; i++) {
|
|
|
|
if ((i * 2 + 4) <= data_len) {
|
|
|
|
data[i] = hex2nib(words[3][i * 2 + 2]) << 4;
|
|
|
|
data[i] |= hex2nib(words[3][i * 2 + 3]);
|
|
|
|
} else {
|
|
|
|
data[i] = 0;
|
|
|
|
}
|
|
|
|
}
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
|
|
|
|
len);
|
2012-03-28 17:42:02 +04:00
|
|
|
g_free(data);
|
|
|
|
|
2015-05-22 21:13:44 +03:00
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "OK\n");
|
|
|
|
} else if (strcmp(words[0], "memset") == 0) {
|
|
|
|
uint64_t addr, len;
|
|
|
|
uint8_t *data;
|
2016-09-13 15:52:43 +03:00
|
|
|
unsigned long pattern;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2015-05-22 21:13:44 +03:00
|
|
|
|
|
|
|
g_assert(words[1] && words[2] && words[3]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtou64(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtou64(words[2], NULL, 0, &len);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtoul(words[3], NULL, 0, &pattern);
|
|
|
|
g_assert(ret == 0);
|
2015-05-22 21:13:44 +03:00
|
|
|
|
2016-08-05 13:43:20 +03:00
|
|
|
if (len) {
|
|
|
|
data = g_malloc(len);
|
|
|
|
memset(data, pattern, len);
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
|
|
|
|
data, len);
|
2016-08-05 13:43:20 +03:00
|
|
|
g_free(data);
|
|
|
|
}
|
2015-05-22 21:13:44 +03:00
|
|
|
|
2015-05-22 21:13:44 +03:00
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "OK\n");
|
|
|
|
} else if (strcmp(words[0], "b64write") == 0) {
|
|
|
|
uint64_t addr, len;
|
|
|
|
uint8_t *data;
|
|
|
|
size_t data_len;
|
|
|
|
gsize out_len;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2015-05-22 21:13:44 +03:00
|
|
|
|
|
|
|
g_assert(words[1] && words[2] && words[3]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtou64(words[1], NULL, 0, &addr);
|
|
|
|
g_assert(ret == 0);
|
|
|
|
ret = qemu_strtou64(words[2], NULL, 0, &len);
|
|
|
|
g_assert(ret == 0);
|
2015-05-22 21:13:44 +03:00
|
|
|
|
|
|
|
data_len = strlen(words[3]);
|
|
|
|
if (data_len < 3) {
|
|
|
|
qtest_send(chr, "ERR invalid argument size\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
data = g_base64_decode_inplace(words[3], &out_len);
|
|
|
|
if (out_len != len) {
|
|
|
|
qtest_log_send("b64write: data length mismatch (told %"PRIu64", "
|
|
|
|
"found %zu)\n",
|
|
|
|
len, out_len);
|
|
|
|
out_len = MIN(out_len, len);
|
|
|
|
}
|
|
|
|
|
2020-02-18 14:24:57 +03:00
|
|
|
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
|
|
|
|
len);
|
2015-05-22 21:13:44 +03:00
|
|
|
|
2012-03-28 17:42:02 +04:00
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_send(chr, "OK\n");
|
2016-10-07 13:14:27 +03:00
|
|
|
} else if (strcmp(words[0], "endianness") == 0) {
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
#if defined(TARGET_WORDS_BIGENDIAN)
|
|
|
|
qtest_sendf(chr, "OK big\n");
|
|
|
|
#else
|
|
|
|
qtest_sendf(chr, "OK little\n");
|
|
|
|
#endif
|
2020-02-06 02:20:15 +03:00
|
|
|
#ifdef CONFIG_PSERIES
|
2016-09-13 15:52:45 +03:00
|
|
|
} else if (strcmp(words[0], "rtas") == 0) {
|
|
|
|
uint64_t res, args, ret;
|
|
|
|
unsigned long nargs, nret;
|
2017-09-11 20:19:46 +03:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = qemu_strtoul(words[2], NULL, 0, &nargs);
|
|
|
|
g_assert(rc == 0);
|
|
|
|
rc = qemu_strtou64(words[3], NULL, 0, &args);
|
|
|
|
g_assert(rc == 0);
|
|
|
|
rc = qemu_strtoul(words[4], NULL, 0, &nret);
|
|
|
|
g_assert(rc == 0);
|
|
|
|
rc = qemu_strtou64(words[5], NULL, 0, &ret);
|
|
|
|
g_assert(rc == 0);
|
2016-09-13 15:52:45 +03:00
|
|
|
res = qtest_rtas_call(words[1], nargs, args, nret, ret);
|
|
|
|
|
|
|
|
qtest_send_prefix(chr);
|
|
|
|
qtest_sendf(chr, "OK %"PRIu64"\n", res);
|
|
|
|
#endif
|
2013-10-18 15:51:11 +04:00
|
|
|
} else if (qtest_enabled() && strcmp(words[0], "clock_step") == 0) {
|
2012-03-28 17:42:04 +04:00
|
|
|
int64_t ns;
|
|
|
|
|
|
|
|
if (words[1]) {
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret = qemu_strtoi64(words[1], NULL, 0, &ns);
|
|
|
|
g_assert(ret == 0);
|
2012-03-28 17:42:04 +04:00
|
|
|
} else {
|
2019-07-25 11:44:26 +03:00
|
|
|
ns = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
|
|
|
|
QEMU_TIMER_ATTR_ALL);
|
2012-03-28 17:42:04 +04:00
|
|
|
}
|
2013-08-21 19:03:08 +04:00
|
|
|
qtest_clock_warp(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ns);
|
2012-03-28 17:42:04 +04:00
|
|
|
qtest_send_prefix(chr);
|
2015-05-22 21:13:43 +03:00
|
|
|
qtest_sendf(chr, "OK %"PRIi64"\n",
|
|
|
|
(int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
|
2019-07-22 21:51:40 +03:00
|
|
|
} else if (strcmp(words[0], "module_load") == 0) {
|
|
|
|
g_assert(words[1] && words[2]);
|
|
|
|
|
|
|
|
qtest_send_prefix(chr);
|
2020-09-23 12:12:17 +03:00
|
|
|
if (module_load_one(words[1], words[2], false)) {
|
2019-07-22 21:51:40 +03:00
|
|
|
qtest_sendf(chr, "OK\n");
|
|
|
|
} else {
|
|
|
|
qtest_sendf(chr, "FAIL\n");
|
|
|
|
}
|
2013-10-18 15:51:11 +04:00
|
|
|
} else if (qtest_enabled() && strcmp(words[0], "clock_set") == 0) {
|
2012-03-28 17:42:04 +04:00
|
|
|
int64_t ns;
|
2017-09-11 20:19:46 +03:00
|
|
|
int ret;
|
2012-03-28 17:42:04 +04:00
|
|
|
|
|
|
|
g_assert(words[1]);
|
2017-09-11 20:19:46 +03:00
|
|
|
ret = qemu_strtoi64(words[1], NULL, 0, &ns);
|
|
|
|
g_assert(ret == 0);
|
2012-03-28 17:42:04 +04:00
|
|
|
qtest_clock_warp(ns);
|
|
|
|
qtest_send_prefix(chr);
|
2015-05-22 21:13:43 +03:00
|
|
|
qtest_sendf(chr, "OK %"PRIi64"\n",
|
|
|
|
(int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
|
2012-03-28 17:42:02 +04:00
|
|
|
} else {
|
|
|
|
qtest_send_prefix(chr);
|
2015-05-22 21:13:43 +03:00
|
|
|
qtest_sendf(chr, "FAIL Unknown command '%s'\n", words[0]);
|
2012-03-28 17:42:02 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-22 12:52:55 +03:00
|
|
|
static void qtest_process_inbuf(CharBackend *chr, GString *inbuf)
|
2012-03-28 17:42:02 +04:00
|
|
|
{
|
|
|
|
char *end;
|
|
|
|
|
|
|
|
while ((end = strchr(inbuf->str, '\n')) != NULL) {
|
|
|
|
size_t offset;
|
|
|
|
GString *cmd;
|
|
|
|
gchar **words;
|
|
|
|
|
|
|
|
offset = end - inbuf->str;
|
|
|
|
|
|
|
|
cmd = g_string_new_len(inbuf->str, offset);
|
|
|
|
g_string_erase(inbuf, 0, offset + 1);
|
|
|
|
|
|
|
|
words = g_strsplit(cmd->str, " ", 0);
|
|
|
|
qtest_process_command(chr, words);
|
|
|
|
g_strfreev(words);
|
|
|
|
|
|
|
|
g_string_free(cmd, TRUE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void qtest_read(void *opaque, const uint8_t *buf, int size)
|
|
|
|
{
|
2016-10-22 12:52:55 +03:00
|
|
|
CharBackend *chr = opaque;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
|
|
|
g_string_append_len(inbuf, (const gchar *)buf, size);
|
|
|
|
qtest_process_inbuf(chr, inbuf);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int qtest_can_read(void *opaque)
|
|
|
|
{
|
|
|
|
return 1024;
|
|
|
|
}
|
|
|
|
|
chardev: Use QEMUChrEvent enum in IOEventHandler typedef
The Chardev events are listed in the QEMUChrEvent enum.
By using the enum in the IOEventHandler typedef we:
- make the IOEventHandler type more explicit (this handler
process out-of-band information, while the IOReadHandler
is in-band),
- help static code analyzers.
This patch was produced with the following spatch script:
@match@
expression backend, opaque, context, set_open;
identifier fd_can_read, fd_read, fd_event, be_change;
@@
qemu_chr_fe_set_handlers(backend, fd_can_read, fd_read, fd_event,
be_change, opaque, context, set_open);
@depends on match@
identifier opaque, event;
identifier match.fd_event;
@@
static
-void fd_event(void *opaque, int event)
+void fd_event(void *opaque, QEMUChrEvent event)
{
...
}
Then the typedef was modified manually in
include/chardev/char-fe.h.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20191218172009.8868-15-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-18 20:20:09 +03:00
|
|
|
static void qtest_event(void *opaque, QEMUChrEvent event)
|
2012-03-28 17:42:02 +04:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case CHR_EVENT_OPENED:
|
2013-06-26 17:52:12 +04:00
|
|
|
/*
|
|
|
|
* We used to call qemu_system_reset() here, hoping we could
|
|
|
|
* use the same process for multiple tests that way. Never
|
|
|
|
* used. Injects an extra reset even when it's not used, and
|
|
|
|
* that can mess up tests, e.g. -boot once.
|
|
|
|
*/
|
2012-03-28 17:42:02 +04:00
|
|
|
for (i = 0; i < ARRAY_SIZE(irq_levels); i++) {
|
|
|
|
irq_levels[i] = 0;
|
|
|
|
}
|
2012-03-30 23:04:04 +04:00
|
|
|
qemu_gettimeofday(&start_time);
|
2012-03-28 17:42:02 +04:00
|
|
|
qtest_opened = true;
|
|
|
|
if (qtest_log_fp) {
|
|
|
|
fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n",
|
2013-08-21 00:53:25 +04:00
|
|
|
(long) start_time.tv_sec, (long) start_time.tv_usec);
|
2012-03-28 17:42:02 +04:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case CHR_EVENT_CLOSED:
|
|
|
|
qtest_opened = false;
|
|
|
|
if (qtest_log_fp) {
|
2012-03-30 23:04:04 +04:00
|
|
|
qemu_timeval tv;
|
2012-03-28 17:42:02 +04:00
|
|
|
qtest_get_time(&tv);
|
|
|
|
fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n",
|
2013-08-21 00:53:25 +04:00
|
|
|
(long) tv.tv_sec, (long) tv.tv_usec);
|
2012-03-28 17:42:02 +04:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2019-08-05 06:13:01 +03:00
|
|
|
void qtest_server_init(const char *qtest_chrdev, const char *qtest_log, Error **errp)
|
2013-10-18 15:51:11 +04:00
|
|
|
{
|
2016-12-07 16:20:22 +03:00
|
|
|
Chardev *chr;
|
2012-03-28 17:42:02 +04:00
|
|
|
|
2019-02-13 16:18:13 +03:00
|
|
|
chr = qemu_chr_new("qtest", qtest_chrdev, NULL);
|
2012-03-28 17:42:02 +04:00
|
|
|
|
2014-02-10 05:28:02 +04:00
|
|
|
if (chr == NULL) {
|
|
|
|
error_setg(errp, "Failed to initialize device for qtest: \"%s\"",
|
|
|
|
qtest_chrdev);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2012-03-28 17:42:02 +04:00
|
|
|
if (qtest_log) {
|
|
|
|
if (strcmp(qtest_log, "none") != 0) {
|
|
|
|
qtest_log_fp = fopen(qtest_log, "w+");
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
qtest_log_fp = stderr;
|
|
|
|
}
|
|
|
|
|
2016-10-22 12:52:55 +03:00
|
|
|
qemu_chr_fe_init(&qtest_chr, chr, errp);
|
|
|
|
qemu_chr_fe_set_handlers(&qtest_chr, qtest_can_read, qtest_read,
|
2017-07-06 15:08:49 +03:00
|
|
|
qtest_event, NULL, &qtest_chr, NULL, true);
|
2016-10-22 12:52:55 +03:00
|
|
|
qemu_chr_fe_set_echo(&qtest_chr, true);
|
2014-10-22 06:26:47 +04:00
|
|
|
|
|
|
|
inbuf = g_string_new("");
|
2020-02-20 07:11:01 +03:00
|
|
|
|
|
|
|
if (!qtest_server_send) {
|
|
|
|
qtest_server_set_send_handler(qtest_server_char_be_send, &qtest_chr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-02-27 06:14:39 +03:00
|
|
|
void qtest_server_set_send_handler(void (*send)(void*, const char*),
|
|
|
|
void *opaque)
|
2020-02-20 07:11:01 +03:00
|
|
|
{
|
|
|
|
qtest_server_send = send;
|
|
|
|
qtest_server_send_opaque = opaque;
|
2012-03-28 17:42:02 +04:00
|
|
|
}
|
2014-02-04 22:06:47 +04:00
|
|
|
|
|
|
|
bool qtest_driver(void)
|
|
|
|
{
|
2016-10-22 12:52:52 +03:00
|
|
|
return qtest_chr.chr != NULL;
|
2014-02-04 22:06:47 +04:00
|
|
|
}
|
2020-02-20 07:11:04 +03:00
|
|
|
|
|
|
|
void qtest_server_inproc_recv(void *dummy, const char *buf)
|
|
|
|
{
|
|
|
|
static GString *gstr;
|
|
|
|
if (!gstr) {
|
|
|
|
gstr = g_string_new(NULL);
|
|
|
|
}
|
|
|
|
g_string_append(gstr, buf);
|
|
|
|
if (gstr->str[gstr->len - 1] == '\n') {
|
|
|
|
qtest_process_inbuf(NULL, gstr);
|
|
|
|
g_string_truncate(gstr, 0);
|
|
|
|
}
|
|
|
|
}
|