qemu/include/hw/sparc/sparc64.h

#ifndef HW_SPARC_SPARC64_H
#define HW_SPARC_SPARC64_H

#include "target/sparc/cpu-qom.h"

#define IVEC_MAX             0x40

SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr);

void sparc64_cpu_set_ivec_irq(void *opaque, int irq, int level);

#endif
Supply missing header guards Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190604181618.19980-5-armbru@redhat.com> 2019-06-04 21:16:18 +03:00			`#ifndef HW_SPARC_SPARC64_H`
			`#define HW_SPARC_SPARC64_H`
target-sparc: move common cpu initialisation routines to sparc64.c Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> 2016-09-29 15:02:19 +03:00
include: Make headers more self-contained Back in 2016, we discussed[1] rules for headers, and these were generally liked: 1. Have a carefully curated header that's included everywhere first. We got that already thanks to Peter: osdep.h. 2. Headers should normally include everything they need beyond osdep.h. If exceptions are needed for some reason, they must be documented in the header. If all that's needed from a header is typedefs, put those into qemu/typedefs.h instead of including the header. 3. Cyclic inclusion is forbidden. This patch gets include/ closer to obeying 2. It's actually extracted from my "[RFC] Baby steps towards saner headers" series[2], which demonstrates a possible path towards checking 2 automatically. It passes the RFC test there. [1] Message-ID: <87h9g8j57d.fsf@blackfin.pond.sub.org> https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg03345.html [2] Message-Id: <20190711122827.18970-1-armbru@redhat.com> https://lists.nongnu.org/archive/html/qemu-devel/2019-07/msg02715.html Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-2-armbru@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> 2019-08-12 08:23:31 +03:00			`#include "target/sparc/cpu-qom.h"`

apb: use gpios to wire up the apb device to the SPARC CPU IRQs Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> 2017-12-21 10:32:57 +03:00			`#define IVEC_MAX 0x40`

sparc: sun4u/sun4v/niagara: use generic cpu_model parsing Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1507211474-188400-33-git-send-email-imammedo@redhat.com> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> 2017-10-05 16:51:06 +03:00			`SPARCCPU sparc64_cpu_devinit(const char cpu_type, uint64_t prom_addr);`
target-sparc: move common cpu initialisation routines to sparc64.c Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> 2016-09-29 15:02:19 +03:00
			`void sparc64_cpu_set_ivec_irq(void *opaque, int irq, int level);`
Supply missing header guards Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190604181618.19980-5-armbru@redhat.com> 2019-06-04 21:16:18 +03:00
			`#endif`