2019-10-20 02:47:00 +03:00
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/*
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* BCM2835 dummy thermal sensor
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*
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* Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qapi/error.h"
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#include "hw/misc/bcm2835_thermal.h"
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#include "hw/registerfields.h"
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#include "migration/vmstate.h"
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REG32(CTL, 0)
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FIELD(CTL, POWER_DOWN, 0, 1)
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FIELD(CTL, RESET, 1, 1)
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FIELD(CTL, BANDGAP_CTRL, 2, 3)
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FIELD(CTL, INTERRUPT_ENABLE, 5, 1)
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FIELD(CTL, DIRECT, 6, 1)
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FIELD(CTL, INTERRUPT_CLEAR, 7, 1)
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FIELD(CTL, HOLD, 8, 10)
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FIELD(CTL, RESET_DELAY, 18, 8)
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FIELD(CTL, REGULATOR_ENABLE, 26, 1)
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REG32(STAT, 4)
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FIELD(STAT, DATA, 0, 10)
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FIELD(STAT, VALID, 10, 1)
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FIELD(STAT, INTERRUPT, 11, 1)
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#define THERMAL_OFFSET_C 412
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#define THERMAL_COEFF (-0.538f)
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static uint16_t bcm2835_thermal_temp2adc(int temp_C)
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{
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return (temp_C - THERMAL_OFFSET_C) / THERMAL_COEFF;
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}
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static uint64_t bcm2835_thermal_read(void *opaque, hwaddr addr, unsigned size)
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{
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Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
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uint32_t val = 0;
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switch (addr) {
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case A_CTL:
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val = s->ctl;
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break;
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case A_STAT:
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/* Temperature is constantly 25°C. */
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val = FIELD_DP32(bcm2835_thermal_temp2adc(25), STAT, VALID, true);
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break;
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default:
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/* MemoryRegionOps are aligned, so this can not happen. */
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g_assert_not_reached();
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}
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return val;
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}
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static void bcm2835_thermal_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size)
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{
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Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
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switch (addr) {
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case A_CTL:
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s->ctl = value;
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break;
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case A_STAT:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: write 0x%" PRIx64
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" to 0x%" HWADDR_PRIx "\n",
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__func__, value, addr);
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break;
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default:
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/* MemoryRegionOps are aligned, so this can not happen. */
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g_assert_not_reached();
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}
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}
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static const MemoryRegionOps bcm2835_thermal_ops = {
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.read = bcm2835_thermal_read,
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.write = bcm2835_thermal_write,
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2024-07-02 18:40:41 +03:00
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.impl.min_access_size = 4,
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2019-10-20 02:47:00 +03:00
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.impl.max_access_size = 4,
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.valid.min_access_size = 4,
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2024-07-02 18:40:41 +03:00
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.valid.max_access_size = 4,
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2019-10-20 02:47:00 +03:00
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void bcm2835_thermal_reset(DeviceState *dev)
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{
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Bcm2835ThermalState *s = BCM2835_THERMAL(dev);
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s->ctl = 0;
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}
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static void bcm2835_thermal_realize(DeviceState *dev, Error **errp)
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{
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Bcm2835ThermalState *s = BCM2835_THERMAL(dev);
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memory_region_init_io(&s->iomem, OBJECT(s), &bcm2835_thermal_ops,
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s, TYPE_BCM2835_THERMAL, 8);
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sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
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}
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static const VMStateDescription bcm2835_thermal_vmstate = {
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.name = "bcm2835_thermal",
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.version_id = 1,
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.minimum_version_id = 1,
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2023-12-21 06:16:21 +03:00
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.fields = (const VMStateField[]) {
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2019-10-20 02:47:00 +03:00
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VMSTATE_UINT32(ctl, Bcm2835ThermalState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void bcm2835_thermal_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = bcm2835_thermal_realize;
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dc->reset = bcm2835_thermal_reset;
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dc->vmsd = &bcm2835_thermal_vmstate;
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}
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static const TypeInfo bcm2835_thermal_info = {
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.name = TYPE_BCM2835_THERMAL,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(Bcm2835ThermalState),
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.class_init = bcm2835_thermal_class_init,
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};
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static void bcm2835_thermal_register_types(void)
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{
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type_register_static(&bcm2835_thermal_info);
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}
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type_init(bcm2835_thermal_register_types)
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