qemu/default-configs/targets/riscv32-softmmu.mak

TARGET_ARCH=riscv32
TARGET_BASE_ARCH=riscv
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/riscv-32bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-32bit-virtual.xml
TARGET_NEED_FDT=y
default-configs: use TARGET_ARCH key Replace the individual TARGET_*=y lines with TARGET_ARCH, similar to how TARGET_BASE_ARCH is handled already. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 2020-09-21 12:11:01 +03:00			`TARGET_ARCH=riscv32`
configure: remove target configuration The config-target.mak files are small constant, we can therefore just write them down explicitly. This removes a pretty large part of the configure script, including the whole logic to detect which accelerators are supported by each target. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 2020-09-21 11:37:49 +03:00			`TARGET_BASE_ARCH=riscv`
			`TARGET_SUPPORTS_MTTCG=y`
target/riscv: Remove built-in GDB XML files for CSRs Now that we have switched to generate the RISC-V CSR XML dynamically, remove the built-in hardcoded XML files. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210116054123.5457-3-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com> 2021-01-16 08:41:23 +03:00			`TARGET_XML_FILES= gdb-xml/riscv-32bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-32bit-virtual.xml`
dtc: Convert Makefile bits to meson bits Build the library via the main meson.build just like for capstone. This improves the current state of affairs in that we will re-link the qemu executables against a changed libfdt.a, which we wouldn't do before-hand, and lets us remove the whole recursive make machinery. Tested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 2020-10-05 12:31:15 +03:00			`TARGET_NEED_FDT=y`