2011-04-01 08:15:20 +04:00
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/*
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* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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* Copyright (c) 2010 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include "sysemu.h"
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#include "hw.h"
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#include "elf.h"
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2011-04-01 08:15:29 +04:00
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#include "net.h"
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2011-04-01 08:15:31 +04:00
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#include "blockdev.h"
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2011-09-30 01:39:10 +04:00
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#include "cpus.h"
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#include "kvm.h"
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#include "kvm_ppc.h"
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2011-04-01 08:15:20 +04:00
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#include "hw/boards.h"
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#include "hw/ppc.h"
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#include "hw/loader.h"
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#include "hw/spapr.h"
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2011-04-01 08:15:21 +04:00
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#include "hw/spapr_vio.h"
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2011-10-30 21:16:46 +04:00
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#include "hw/spapr_pci.h"
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Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
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#include "hw/xics.h"
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2011-04-01 08:15:20 +04:00
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2011-08-09 19:57:37 +04:00
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#include "kvm.h"
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#include "kvm_ppc.h"
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2011-10-30 21:16:46 +04:00
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#include "pci.h"
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2011-08-09 19:57:37 +04:00
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2011-10-03 14:56:38 +04:00
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#include "exec-memory.h"
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2011-04-01 08:15:20 +04:00
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#include <libfdt.h>
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2012-01-11 23:46:28 +04:00
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/* SLOF memory layout:
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*
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* SLOF raw image loaded at 0, copies its romfs right below the flat
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* device-tree, then position SLOF itself 31M below that
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*
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* So we set FW_OVERHEAD to 40MB which should account for all of that
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* and more
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*
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* We load our kernel at 4M, leaving space for SLOF initial image
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*/
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2011-04-01 08:15:20 +04:00
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#define FDT_MAX_SIZE 0x10000
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2011-04-01 08:15:23 +04:00
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#define RTAS_MAX_SIZE 0x10000
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Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
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#define FW_MAX_SIZE 0x400000
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#define FW_FILE_NAME "slof.bin"
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2012-01-11 23:46:28 +04:00
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#define FW_OVERHEAD 0x2800000
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#define KERNEL_LOAD_ADDR FW_MAX_SIZE
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Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
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2012-01-11 23:46:28 +04:00
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#define MIN_RMA_SLOF 128UL
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2011-04-01 08:15:20 +04:00
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#define TIMEBASE_FREQ 512000000ULL
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2011-04-19 05:54:50 +04:00
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#define MAX_CPUS 256
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2012-01-11 23:46:28 +04:00
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#define XICS_IRQS 1024
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2011-04-01 08:15:20 +04:00
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2011-10-30 21:16:46 +04:00
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#define SPAPR_PCI_BUID 0x800000020000001ULL
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#define SPAPR_PCI_MEM_WIN_ADDR (0x10000000000ULL + 0xA0000000)
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#define SPAPR_PCI_MEM_WIN_SIZE 0x20000000
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#define SPAPR_PCI_IO_WIN_ADDR (0x10000000000ULL + 0x80000000)
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2011-08-04 01:02:17 +04:00
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#define PHANDLE_XICP 0x00001111
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2011-04-01 08:15:20 +04:00
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sPAPREnvironment *spapr;
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pseries: Add support for level interrupts to XICS
The pseries "xics" interrupt controller, like most interrupt
controllers can support both message (i.e. edge sensitive) interrupts
and level sensitive interrupts, but it needs to know which are which.
When I implemented the xics emulation for qemu, the only devices we
supported were the PAPR virtual IO devices. These devices only use
message interrupts, so they were the only ones I implemented in xics.
Since then, however, we have added support for PCI devices, which use
level sensitive interrupts. It turns out the message interrupt logic
still actually works most of the time for these, but there are
circumstances where we can lost interrupts due to the incorrect
interrupt logic.
This patch, therefore, implements the correct xics level-sensitive
interrupt logic. The type of the interrupt is set when a device
allocates a new xics interrupt.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-03-07 19:12:21 +04:00
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qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,
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enum xics_irq_type type)
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2011-09-16 00:49:49 +04:00
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{
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uint32_t irq;
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qemu_irq qirq;
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if (hint) {
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irq = hint;
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/* FIXME: we should probably check for collisions somehow */
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} else {
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irq = spapr->next_irq++;
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}
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pseries: Add support for level interrupts to XICS
The pseries "xics" interrupt controller, like most interrupt
controllers can support both message (i.e. edge sensitive) interrupts
and level sensitive interrupts, but it needs to know which are which.
When I implemented the xics emulation for qemu, the only devices we
supported were the PAPR virtual IO devices. These devices only use
message interrupts, so they were the only ones I implemented in xics.
Since then, however, we have added support for PCI devices, which use
level sensitive interrupts. It turns out the message interrupt logic
still actually works most of the time for these, but there are
circumstances where we can lost interrupts due to the incorrect
interrupt logic.
This patch, therefore, implements the correct xics level-sensitive
interrupt logic. The type of the interrupt is set when a device
allocates a new xics interrupt.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-03-07 19:12:21 +04:00
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qirq = xics_assign_irq(spapr->icp, irq, type);
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2011-09-16 00:49:49 +04:00
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if (!qirq) {
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return NULL;
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}
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if (irq_num) {
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*irq_num = irq;
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}
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return qirq;
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}
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2011-12-12 22:24:30 +04:00
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static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr)
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{
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int ret = 0, offset;
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2012-03-14 04:38:23 +04:00
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CPUPPCState *env;
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2011-12-12 22:24:30 +04:00
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char cpu_model[32];
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int smt = kvmppc_smt_threads();
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assert(spapr->cpu_model);
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for (env = first_cpu; env != NULL; env = env->next_cpu) {
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uint32_t associativity[] = {cpu_to_be32(0x5),
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cpu_to_be32(0x0),
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cpu_to_be32(0x0),
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cpu_to_be32(0x0),
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cpu_to_be32(env->numa_node),
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cpu_to_be32(env->cpu_index)};
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if ((env->cpu_index % smt) != 0) {
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continue;
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}
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snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model,
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env->cpu_index);
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offset = fdt_path_offset(fdt, cpu_model);
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if (offset < 0) {
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return offset;
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}
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ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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sizeof(associativity));
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if (ret < 0) {
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return ret;
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}
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}
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return ret;
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}
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2012-06-18 23:56:30 +04:00
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static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
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size_t maxsize)
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{
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size_t maxcells = maxsize / sizeof(uint32_t);
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int i, j, count;
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uint32_t *p = prop;
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for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
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struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
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if (!sps->page_shift) {
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break;
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}
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for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
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if (sps->enc[count].page_shift == 0) {
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break;
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}
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}
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if ((p - prop) >= (maxcells - 3 - count * 2)) {
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break;
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}
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*(p++) = cpu_to_be32(sps->page_shift);
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*(p++) = cpu_to_be32(sps->slb_enc);
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*(p++) = cpu_to_be32(count);
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for (j = 0; j < count; j++) {
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*(p++) = cpu_to_be32(sps->enc[j].page_shift);
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*(p++) = cpu_to_be32(sps->enc[j].pte_enc);
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}
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}
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return (p - prop) * sizeof(uint32_t);
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}
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Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
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static void *spapr_create_fdt_skel(const char *cpu_model,
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2011-09-30 01:39:11 +04:00
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target_phys_addr_t rma_size,
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Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
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target_phys_addr_t initrd_base,
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target_phys_addr_t initrd_size,
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2012-01-11 23:46:28 +04:00
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target_phys_addr_t kernel_size,
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Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
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const char *boot_device,
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const char *kernel_cmdline,
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long hash_shift)
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2011-04-01 08:15:20 +04:00
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{
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void *fdt;
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2012-03-14 04:38:23 +04:00
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CPUPPCState *env;
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2011-12-12 22:24:30 +04:00
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uint64_t mem_reg_property[2];
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2011-04-01 08:15:20 +04:00
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uint32_t start_prop = cpu_to_be32(initrd_base);
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uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
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2011-04-01 08:15:22 +04:00
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uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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2011-04-01 08:15:28 +04:00
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char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
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2011-08-31 19:50:50 +04:00
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"\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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2012-06-19 00:21:37 +04:00
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char qemu_hypertas_prop[] = "hcall-memop1";
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Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
|
2011-04-01 08:15:20 +04:00
|
|
|
int i;
|
|
|
|
char *modelname;
|
2011-09-30 01:39:10 +04:00
|
|
|
int smt = kvmppc_smt_threads();
|
2011-12-12 22:24:30 +04:00
|
|
|
unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
|
|
|
|
uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
|
|
|
|
uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0), cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0)};
|
|
|
|
char mem_name[32];
|
|
|
|
target_phys_addr_t node0_size, mem_start;
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
#define _FDT(exp) \
|
|
|
|
do { \
|
|
|
|
int ret = (exp); \
|
|
|
|
if (ret < 0) { \
|
|
|
|
fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
|
|
|
|
#exp, fdt_strerror(ret)); \
|
|
|
|
exit(1); \
|
|
|
|
} \
|
|
|
|
} while (0)
|
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
fdt = g_malloc0(FDT_MAX_SIZE);
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_create(fdt, FDT_MAX_SIZE)));
|
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
if (kernel_size) {
|
|
|
|
_FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
|
|
|
|
}
|
|
|
|
if (initrd_size) {
|
|
|
|
_FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_finish_reservemap(fdt)));
|
|
|
|
|
|
|
|
/* Root node */
|
|
|
|
_FDT((fdt_begin_node(fdt, "")));
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "chrp")));
|
2011-04-19 05:54:51 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
_FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
|
|
|
|
|
|
|
|
/* /chosen */
|
|
|
|
_FDT((fdt_begin_node(fdt, "chosen")));
|
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* Set Form1_affinity */
|
|
|
|
_FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
|
|
|
|
_FDT((fdt_property(fdt, "linux,initrd-start",
|
|
|
|
&start_prop, sizeof(start_prop))));
|
|
|
|
_FDT((fdt_property(fdt, "linux,initrd-end",
|
|
|
|
&end_prop, sizeof(end_prop))));
|
2012-01-11 23:46:28 +04:00
|
|
|
if (kernel_size) {
|
|
|
|
uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
|
|
|
|
cpu_to_be64(kernel_size) };
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
_FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
|
|
|
|
}
|
|
|
|
_FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
|
2011-10-30 21:16:46 +04:00
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2011-09-30 01:39:11 +04:00
|
|
|
/* memory node(s) */
|
2011-12-12 22:24:30 +04:00
|
|
|
node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
|
|
|
|
if (rma_size > node0_size) {
|
|
|
|
rma_size = node0_size;
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* RMA */
|
|
|
|
mem_reg_property[0] = 0;
|
|
|
|
mem_reg_property[1] = cpu_to_be64(rma_size);
|
|
|
|
_FDT((fdt_begin_node(fdt, "memory@0")));
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "memory")));
|
2011-12-12 22:24:30 +04:00
|
|
|
_FDT((fdt_property(fdt, "reg", mem_reg_property,
|
|
|
|
sizeof(mem_reg_property))));
|
|
|
|
_FDT((fdt_property(fdt, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity))));
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* RAM: Node 0 */
|
|
|
|
if (node0_size > rma_size) {
|
|
|
|
mem_reg_property[0] = cpu_to_be64(rma_size);
|
|
|
|
mem_reg_property[1] = cpu_to_be64(node0_size - rma_size);
|
2011-09-30 01:39:11 +04:00
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
sprintf(mem_name, "memory@" TARGET_FMT_lx, rma_size);
|
2011-09-30 01:39:11 +04:00
|
|
|
_FDT((fdt_begin_node(fdt, mem_name)));
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "memory")));
|
2011-12-12 22:24:30 +04:00
|
|
|
_FDT((fdt_property(fdt, "reg", mem_reg_property,
|
|
|
|
sizeof(mem_reg_property))));
|
|
|
|
_FDT((fdt_property(fdt, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity))));
|
2011-09-30 01:39:11 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
}
|
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* RAM: Node 1 and beyond */
|
|
|
|
mem_start = node0_size;
|
|
|
|
for (i = 1; i < nb_numa_nodes; i++) {
|
|
|
|
mem_reg_property[0] = cpu_to_be64(mem_start);
|
|
|
|
mem_reg_property[1] = cpu_to_be64(node_mem[i]);
|
|
|
|
associativity[3] = associativity[4] = cpu_to_be32(i);
|
|
|
|
sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
|
|
|
|
_FDT((fdt_begin_node(fdt, mem_name)));
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "memory")));
|
|
|
|
_FDT((fdt_property(fdt, "reg", mem_reg_property,
|
|
|
|
sizeof(mem_reg_property))));
|
|
|
|
_FDT((fdt_property(fdt, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity))));
|
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
mem_start += node_mem[i];
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
/* cpus */
|
|
|
|
_FDT((fdt_begin_node(fdt, "cpus")));
|
|
|
|
|
|
|
|
_FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
|
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
modelname = g_strdup(cpu_model);
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
for (i = 0; i < strlen(modelname); i++) {
|
|
|
|
modelname[i] = toupper(modelname[i]);
|
|
|
|
}
|
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* This is needed during FDT finalization */
|
|
|
|
spapr->cpu_model = g_strdup(modelname);
|
|
|
|
|
2011-04-05 09:12:09 +04:00
|
|
|
for (env = first_cpu; env != NULL; env = env->next_cpu) {
|
|
|
|
int index = env->cpu_index;
|
2011-09-30 01:39:10 +04:00
|
|
|
uint32_t servers_prop[smp_threads];
|
|
|
|
uint32_t gservers_prop[smp_threads * 2];
|
2011-04-01 08:15:20 +04:00
|
|
|
char *nodename;
|
|
|
|
uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
|
|
|
|
0xffffffff, 0xffffffff};
|
2011-08-09 20:07:13 +04:00
|
|
|
uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
|
|
|
|
uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
2012-06-18 23:56:30 +04:00
|
|
|
uint32_t page_sizes_prop[64];
|
|
|
|
size_t page_sizes_prop_size;
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-09-30 01:39:10 +04:00
|
|
|
if ((index % smt) != 0) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2011-04-05 09:12:09 +04:00
|
|
|
if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
|
2011-04-01 08:15:20 +04:00
|
|
|
fprintf(stderr, "Allocation failure\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
_FDT((fdt_begin_node(fdt, nodename)));
|
|
|
|
|
|
|
|
free(nodename);
|
|
|
|
|
2011-04-05 09:12:09 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "reg", index)));
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "cpu")));
|
|
|
|
|
|
|
|
_FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
|
|
|
_FDT((fdt_property_cell(fdt, "dcache-block-size",
|
|
|
|
env->dcache_line_size)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "icache-block-size",
|
|
|
|
env->icache_line_size)));
|
2011-08-09 20:07:13 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
2011-04-01 08:15:22 +04:00
|
|
|
_FDT((fdt_property(fdt, "ibm,pft-size",
|
|
|
|
pft_size_prop, sizeof(pft_size_prop))));
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "status", "okay")));
|
|
|
|
_FDT((fdt_property(fdt, "64-bit", NULL, 0)));
|
2011-09-30 01:39:10 +04:00
|
|
|
|
|
|
|
/* Build interrupt servers and gservers properties */
|
|
|
|
for (i = 0; i < smp_threads; i++) {
|
|
|
|
servers_prop[i] = cpu_to_be32(index + i);
|
|
|
|
/* Hack, direct the group queues back to cpu 0 */
|
|
|
|
gservers_prop[i*2] = cpu_to_be32(index + i);
|
|
|
|
gservers_prop[i*2 + 1] = 0;
|
|
|
|
}
|
|
|
|
_FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
|
|
|
servers_prop, sizeof(servers_prop))));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
_FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
2011-09-30 01:39:10 +04:00
|
|
|
gservers_prop, sizeof(gservers_prop))));
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-04-05 09:12:09 +04:00
|
|
|
if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
|
|
|
segs, sizeof(segs))));
|
|
|
|
}
|
|
|
|
|
pseries: Add device tree properties for VMX/VSX and DFP under kvm
Sufficiently recent PAPR specifications define properties "ibm,vmx"
and "ibm,dfp" on the CPU node which advertise whether the VMX vector
extensions (or the later VSX version) and/or the Decimal Floating
Point operations from IBM's recent POWER CPUs are available.
Currently we do not put these in the guest device tree and the guest
kernel will consequently assume they are not available. This is good,
because they are not supported under TCG. VMX is similar enough to
Altivec that it might be trivial to support, but VSX and DFP would
both require significant work to support in TCG.
However, when running under kvm on a host which supports these
instructions, there's no reason not to let the guest use them. This
patch, therefore, checks for the relevant support on the host CPU
and, if present, advertises them to the guest as well.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-10 22:31:01 +04:00
|
|
|
/* Advertise VMX/VSX (vector extensions) if available
|
|
|
|
* 0 / no property == no vector extensions
|
|
|
|
* 1 == VMX / Altivec available
|
|
|
|
* 2 == VSX available */
|
2011-10-17 22:15:41 +04:00
|
|
|
if (env->insns_flags & PPC_ALTIVEC) {
|
|
|
|
uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
|
|
|
|
|
pseries: Add device tree properties for VMX/VSX and DFP under kvm
Sufficiently recent PAPR specifications define properties "ibm,vmx"
and "ibm,dfp" on the CPU node which advertise whether the VMX vector
extensions (or the later VSX version) and/or the Decimal Floating
Point operations from IBM's recent POWER CPUs are available.
Currently we do not put these in the guest device tree and the guest
kernel will consequently assume they are not available. This is good,
because they are not supported under TCG. VMX is similar enough to
Altivec that it might be trivial to support, but VSX and DFP would
both require significant work to support in TCG.
However, when running under kvm on a host which supports these
instructions, there's no reason not to let the guest use them. This
patch, therefore, checks for the relevant support on the host CPU
and, if present, advertises them to the guest as well.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-10 22:31:01 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Advertise DFP (Decimal Floating Point) if available
|
|
|
|
* 0 / no property == no DFP
|
|
|
|
* 1 == DFP available */
|
2011-10-17 22:15:41 +04:00
|
|
|
if (env->insns_flags2 & PPC2_DFP) {
|
|
|
|
_FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
|
pseries: Add device tree properties for VMX/VSX and DFP under kvm
Sufficiently recent PAPR specifications define properties "ibm,vmx"
and "ibm,dfp" on the CPU node which advertise whether the VMX vector
extensions (or the later VSX version) and/or the Decimal Floating
Point operations from IBM's recent POWER CPUs are available.
Currently we do not put these in the guest device tree and the guest
kernel will consequently assume they are not available. This is good,
because they are not supported under TCG. VMX is similar enough to
Altivec that it might be trivial to support, but VSX and DFP would
both require significant work to support in TCG.
However, when running under kvm on a host which supports these
instructions, there's no reason not to let the guest use them. This
patch, therefore, checks for the relevant support on the host CPU
and, if present, advertises them to the guest as well.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-10 22:31:01 +04:00
|
|
|
}
|
|
|
|
|
2012-06-18 23:56:30 +04:00
|
|
|
page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
|
|
|
|
sizeof(page_sizes_prop));
|
|
|
|
if (page_sizes_prop_size) {
|
|
|
|
_FDT((fdt_property(fdt, "ibm,segment-page-sizes",
|
|
|
|
page_sizes_prop, page_sizes_prop_size)));
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
}
|
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
g_free(modelname);
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2011-04-01 08:15:22 +04:00
|
|
|
/* RTAS */
|
|
|
|
_FDT((fdt_begin_node(fdt, "rtas")));
|
|
|
|
|
|
|
|
_FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
|
|
|
sizeof(hypertas_prop))));
|
2012-06-19 00:21:37 +04:00
|
|
|
_FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
|
|
|
|
sizeof(qemu_hypertas_prop))));
|
2011-04-01 08:15:22 +04:00
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
_FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
|
|
|
refpoints, sizeof(refpoints))));
|
|
|
|
|
2011-04-01 08:15:22 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
/* interrupt controller */
|
2011-08-04 01:02:18 +04:00
|
|
|
_FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type",
|
|
|
|
"PowerPC-External-Interrupt-Presentation")));
|
|
|
|
_FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
|
|
|
|
_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
|
|
|
|
_FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
|
|
|
interrupt_server_ranges_prop,
|
|
|
|
sizeof(interrupt_server_ranges_prop))));
|
2011-08-04 01:02:17 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
|
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2011-04-01 08:15:21 +04:00
|
|
|
/* vdevice */
|
|
|
|
_FDT((fdt_begin_node(fdt, "vdevice")));
|
|
|
|
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "vdevice")));
|
|
|
|
_FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
|
|
|
|
_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
|
2011-04-01 08:15:21 +04:00
|
|
|
|
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_end_node(fdt))); /* close root node */
|
|
|
|
_FDT((fdt_finish(fdt)));
|
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
return fdt;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_finalize_fdt(sPAPREnvironment *spapr,
|
|
|
|
target_phys_addr_t fdt_addr,
|
|
|
|
target_phys_addr_t rtas_addr,
|
|
|
|
target_phys_addr_t rtas_size)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
void *fdt;
|
2011-10-30 21:16:46 +04:00
|
|
|
sPAPRPHBState *phb;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
fdt = g_malloc(FDT_MAX_SIZE);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
|
|
|
/* open out the base tree into a temp buffer for the final tweaks */
|
|
|
|
_FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
|
2011-04-01 08:15:21 +04:00
|
|
|
|
|
|
|
ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-10-30 21:16:46 +04:00
|
|
|
QLIST_FOREACH(phb, &spapr->phbs, list) {
|
|
|
|
ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:23 +04:00
|
|
|
/* RTAS */
|
|
|
|
ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
|
|
|
}
|
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* Advertise NUMA via ibm,associativity */
|
|
|
|
if (nb_numa_nodes > 1) {
|
|
|
|
ret = spapr_set_associativity(fdt, spapr);
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "Couldn't set up NUMA device tree properties\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-12-13 08:24:34 +04:00
|
|
|
spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
|
|
|
|
|
2011-04-01 08:15:21 +04:00
|
|
|
_FDT((fdt_pack(fdt)));
|
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
|
|
|
hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
|
|
|
fdt_totalsize(fdt), FDT_MAX_SIZE);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
g_free(fdt);
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
|
|
|
|
{
|
|
|
|
return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
|
|
|
|
}
|
|
|
|
|
2012-03-14 04:38:23 +04:00
|
|
|
static void emulate_spapr_hypercall(CPUPPCState *env)
|
2011-04-01 08:15:20 +04:00
|
|
|
{
|
|
|
|
env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
|
|
|
|
}
|
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
static void spapr_reset(void *opaque)
|
|
|
|
{
|
|
|
|
sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
|
|
|
|
|
|
|
|
fprintf(stderr, "sPAPR reset\n");
|
|
|
|
|
|
|
|
/* flush out the hash table */
|
|
|
|
memset(spapr->htab, 0, spapr->htab_size);
|
|
|
|
|
|
|
|
/* Load the fdt */
|
|
|
|
spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
|
|
|
|
spapr->rtas_size);
|
|
|
|
|
|
|
|
/* Set up the entry state */
|
|
|
|
first_cpu->gpr[3] = spapr->fdt_addr;
|
|
|
|
first_cpu->gpr[5] = 0;
|
|
|
|
first_cpu->halted = 0;
|
|
|
|
first_cpu->nip = spapr->entry_point;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2012-02-08 06:03:33 +04:00
|
|
|
static void spapr_cpu_reset(void *opaque)
|
|
|
|
{
|
2012-05-04 19:49:38 +04:00
|
|
|
PowerPCCPU *cpu = opaque;
|
2012-02-08 06:03:33 +04:00
|
|
|
|
2012-05-04 19:49:38 +04:00
|
|
|
cpu_reset(CPU(cpu));
|
2012-02-08 06:03:33 +04:00
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
/* pSeries LPAR / sPAPR hardware init */
|
|
|
|
static void ppc_spapr_init(ram_addr_t ram_size,
|
|
|
|
const char *boot_device,
|
|
|
|
const char *kernel_filename,
|
|
|
|
const char *kernel_cmdline,
|
|
|
|
const char *initrd_filename,
|
|
|
|
const char *cpu_model)
|
|
|
|
{
|
2012-05-03 07:45:10 +04:00
|
|
|
PowerPCCPU *cpu;
|
2012-03-14 04:38:23 +04:00
|
|
|
CPUPPCState *env;
|
2011-04-01 08:15:20 +04:00
|
|
|
int i;
|
2011-10-03 14:56:38 +04:00
|
|
|
MemoryRegion *sysmem = get_system_memory();
|
|
|
|
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
2011-09-30 01:39:11 +04:00
|
|
|
target_phys_addr_t rma_alloc_size, rma_size;
|
2012-01-11 23:46:28 +04:00
|
|
|
uint32_t initrd_base = 0;
|
|
|
|
long kernel_size = 0, initrd_size = 0;
|
|
|
|
long load_limit, rtas_limit, fw_size;
|
2011-04-01 08:15:22 +04:00
|
|
|
long pteg_shift = 17;
|
2011-04-01 08:15:23 +04:00
|
|
|
char *filename;
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-11-01 20:49:05 +04:00
|
|
|
spapr = g_malloc0(sizeof(*spapr));
|
|
|
|
QLIST_INIT(&spapr->phbs);
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
cpu_ppc_hypercall = emulate_spapr_hypercall;
|
|
|
|
|
2011-09-30 01:39:11 +04:00
|
|
|
/* Allocate RMA if necessary */
|
|
|
|
rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
|
|
|
|
|
|
|
if (rma_alloc_size == -1) {
|
|
|
|
hw_error("qemu: Unable to create RMA\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
|
|
|
rma_size = rma_alloc_size;
|
|
|
|
} else {
|
|
|
|
rma_size = ram_size;
|
|
|
|
}
|
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
/* We place the device tree and RTAS just below either the top of the RMA,
|
2011-09-30 01:39:11 +04:00
|
|
|
* or just below 2GB, whichever is lowere, so that it can be
|
|
|
|
* processed with 32-bit real mode code if necessary */
|
2012-01-11 23:46:28 +04:00
|
|
|
rtas_limit = MIN(rma_size, 0x80000000);
|
|
|
|
spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
|
|
|
|
spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;
|
|
|
|
load_limit = spapr->fdt_addr - FW_OVERHEAD;
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
/* init CPUs */
|
|
|
|
if (cpu_model == NULL) {
|
2011-10-13 02:40:34 +04:00
|
|
|
cpu_model = kvm_enabled() ? "host" : "POWER7";
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
for (i = 0; i < smp_cpus; i++) {
|
2012-05-03 07:45:10 +04:00
|
|
|
cpu = cpu_ppc_init(cpu_model);
|
|
|
|
if (cpu == NULL) {
|
2011-04-01 08:15:20 +04:00
|
|
|
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-05-03 07:45:10 +04:00
|
|
|
env = &cpu->env;
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
/* Set time-base frequency to 512 MHz */
|
|
|
|
cpu_ppc_tb_init(env, TIMEBASE_FREQ);
|
2012-05-04 19:49:38 +04:00
|
|
|
qemu_register_reset(spapr_cpu_reset, cpu);
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
env->hreset_vector = 0x60;
|
|
|
|
env->hreset_excp_prefix = 0;
|
2011-04-05 09:12:09 +04:00
|
|
|
env->gpr[3] = env->cpu_index;
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* allocate RAM */
|
2011-08-04 01:02:19 +04:00
|
|
|
spapr->ram_limit = ram_size;
|
2011-09-30 01:39:11 +04:00
|
|
|
if (spapr->ram_limit > rma_alloc_size) {
|
|
|
|
ram_addr_t nonrma_base = rma_alloc_size;
|
|
|
|
ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
|
|
|
|
|
2011-12-20 17:59:12 +04:00
|
|
|
memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
|
|
|
|
vmstate_register_ram_global(ram);
|
2011-09-30 01:39:11 +04:00
|
|
|
memory_region_add_subregion(sysmem, nonrma_base, ram);
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-04-01 08:15:22 +04:00
|
|
|
/* allocate hash page table. For now we always make this 16mb,
|
|
|
|
* later we should probably make it scale to the size of guest
|
|
|
|
* RAM */
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
spapr->htab_size = 1ULL << (pteg_shift + 7);
|
2011-08-09 19:57:37 +04:00
|
|
|
spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size);
|
2011-04-01 08:15:22 +04:00
|
|
|
|
2011-04-05 09:12:09 +04:00
|
|
|
for (env = first_cpu; env != NULL; env = env->next_cpu) {
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
env->external_htab = spapr->htab;
|
2011-04-05 09:12:09 +04:00
|
|
|
env->htab_base = -1;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
env->htab_mask = spapr->htab_size - 1;
|
2011-08-09 19:57:37 +04:00
|
|
|
|
|
|
|
/* Tell KVM that we're in PAPR mode */
|
|
|
|
env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
|
|
|
|
((pteg_shift + 7) - 18);
|
|
|
|
env->spr[SPR_HIOR] = 0;
|
|
|
|
|
|
|
|
if (kvm_enabled()) {
|
|
|
|
kvmppc_set_papr(env);
|
|
|
|
}
|
2011-04-01 08:15:22 +04:00
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:23 +04:00
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
|
2012-01-11 23:46:28 +04:00
|
|
|
rtas_limit - spapr->rtas_addr);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
if (spapr->rtas_size < 0) {
|
2011-04-01 08:15:23 +04:00
|
|
|
hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-01-11 23:46:28 +04:00
|
|
|
if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
|
|
|
hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
|
|
|
spapr->rtas_size, RTAS_MAX_SIZE);
|
|
|
|
exit(1);
|
|
|
|
}
|
2011-08-21 07:09:37 +04:00
|
|
|
g_free(filename);
|
2011-04-01 08:15:23 +04:00
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
/* Set up Interrupt Controller */
|
2011-04-05 09:12:09 +04:00
|
|
|
spapr->icp = xics_system_init(XICS_IRQS);
|
2011-09-16 00:49:49 +04:00
|
|
|
spapr->next_irq = 16;
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
|
|
|
|
/* Set up VIO bus */
|
2011-04-01 08:15:21 +04:00
|
|
|
spapr->vio_bus = spapr_vio_bus_init();
|
|
|
|
|
2011-05-26 13:52:44 +04:00
|
|
|
for (i = 0; i < MAX_SERIAL_PORTS; i++) {
|
2011-04-01 08:15:21 +04:00
|
|
|
if (serial_hds[i]) {
|
2012-04-25 21:55:41 +04:00
|
|
|
spapr_vty_create(spapr->vio_bus, serial_hds[i]);
|
2011-04-01 08:15:21 +04:00
|
|
|
}
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-10-30 21:16:46 +04:00
|
|
|
/* Set up PCI */
|
|
|
|
spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
|
|
|
|
SPAPR_PCI_MEM_WIN_ADDR,
|
|
|
|
SPAPR_PCI_MEM_WIN_SIZE,
|
|
|
|
SPAPR_PCI_IO_WIN_ADDR);
|
|
|
|
|
2011-05-26 13:52:44 +04:00
|
|
|
for (i = 0; i < nb_nics; i++) {
|
2011-04-01 08:15:29 +04:00
|
|
|
NICInfo *nd = &nd_table[i];
|
|
|
|
|
|
|
|
if (!nd->model) {
|
2011-08-21 07:09:37 +04:00
|
|
|
nd->model = g_strdup("ibmveth");
|
2011-04-01 08:15:29 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (strcmp(nd->model, "ibmveth") == 0) {
|
2012-04-25 21:55:41 +04:00
|
|
|
spapr_vlan_create(spapr->vio_bus, nd);
|
2011-04-01 08:15:29 +04:00
|
|
|
} else {
|
2011-10-30 21:16:46 +04:00
|
|
|
pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
2011-04-01 08:15:29 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:31 +04:00
|
|
|
for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
|
2012-04-25 21:55:41 +04:00
|
|
|
spapr_vscsi_create(spapr->vio_bus);
|
2011-04-01 08:15:31 +04:00
|
|
|
}
|
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
if (rma_size < (MIN_RMA_SLOF << 20)) {
|
|
|
|
fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
|
|
|
"%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
fprintf(stderr, "sPAPR memory map:\n");
|
|
|
|
fprintf(stderr, "RTAS : 0x%08lx..%08lx\n",
|
|
|
|
(unsigned long)spapr->rtas_addr,
|
|
|
|
(unsigned long)(spapr->rtas_addr + spapr->rtas_size - 1));
|
|
|
|
fprintf(stderr, "FDT : 0x%08lx..%08lx\n",
|
|
|
|
(unsigned long)spapr->fdt_addr,
|
|
|
|
(unsigned long)(spapr->fdt_addr + FDT_MAX_SIZE - 1));
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
if (kernel_filename) {
|
|
|
|
uint64_t lowaddr = 0;
|
|
|
|
|
|
|
|
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
|
|
|
NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
|
|
|
|
if (kernel_size < 0) {
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
kernel_size = load_image_targphys(kernel_filename,
|
|
|
|
KERNEL_LOAD_ADDR,
|
2012-01-11 23:46:28 +04:00
|
|
|
load_limit - KERNEL_LOAD_ADDR);
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
if (kernel_size < 0) {
|
|
|
|
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
|
|
|
kernel_filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-01-11 23:46:28 +04:00
|
|
|
fprintf(stderr, "Kernel : 0x%08x..%08lx\n",
|
|
|
|
KERNEL_LOAD_ADDR, KERNEL_LOAD_ADDR + kernel_size - 1);
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
/* load initrd */
|
|
|
|
if (initrd_filename) {
|
2012-01-11 23:46:28 +04:00
|
|
|
/* Try to locate the initrd in the gap between the kernel
|
|
|
|
* and the firmware. Add a bit of space just in case
|
|
|
|
*/
|
|
|
|
initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
|
2011-04-01 08:15:20 +04:00
|
|
|
initrd_size = load_image_targphys(initrd_filename, initrd_base,
|
2012-01-11 23:46:28 +04:00
|
|
|
load_limit - initrd_base);
|
2011-04-01 08:15:20 +04:00
|
|
|
if (initrd_size < 0) {
|
|
|
|
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
|
|
|
initrd_filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-01-11 23:46:28 +04:00
|
|
|
fprintf(stderr, "Ramdisk : 0x%08lx..%08lx\n",
|
|
|
|
(long)initrd_base, (long)(initrd_base + initrd_size - 1));
|
2011-04-01 08:15:20 +04:00
|
|
|
} else {
|
|
|
|
initrd_base = 0;
|
|
|
|
initrd_size = 0;
|
|
|
|
}
|
2012-01-11 23:46:28 +04:00
|
|
|
}
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
|
|
|
|
fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
|
|
|
if (fw_size < 0) {
|
|
|
|
hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
g_free(filename);
|
|
|
|
fprintf(stderr, "Firmware load : 0x%08x..%08lx\n",
|
|
|
|
0, fw_size);
|
|
|
|
fprintf(stderr, "Firmware runtime : 0x%08lx..%08lx\n",
|
|
|
|
load_limit, (unsigned long)spapr->fdt_addr);
|
|
|
|
|
|
|
|
spapr->entry_point = 0x100;
|
|
|
|
|
|
|
|
/* SLOF will startup the secondary CPUs using RTAS */
|
|
|
|
for (env = first_cpu; env != NULL; env = env->next_cpu) {
|
|
|
|
env->halted = 1;
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Prepare the device tree */
|
2011-09-30 01:39:11 +04:00
|
|
|
spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size,
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
initrd_base, initrd_size,
|
2012-01-11 23:46:28 +04:00
|
|
|
kernel_size,
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
boot_device, kernel_cmdline,
|
|
|
|
pteg_shift + 7);
|
|
|
|
assert(spapr->fdt_skel != NULL);
|
2011-04-01 08:15:20 +04:00
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
qemu_register_reset(spapr_reset, spapr);
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static QEMUMachine spapr_machine = {
|
|
|
|
.name = "pseries",
|
|
|
|
.desc = "pSeries Logical Partition (PAPR compliant)",
|
|
|
|
.init = ppc_spapr_init,
|
|
|
|
.max_cpus = MAX_CPUS,
|
|
|
|
.no_parallel = 1,
|
2011-04-01 08:15:31 +04:00
|
|
|
.use_scsi = 1,
|
2011-04-01 08:15:20 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
static void spapr_machine_init(void)
|
|
|
|
{
|
|
|
|
qemu_register_machine(&spapr_machine);
|
|
|
|
}
|
|
|
|
|
|
|
|
machine_init(spapr_machine_init);
|