2016-06-29 11:47:26 +03:00
|
|
|
#ifndef MIPS_TARGET_SYSCALL_H
|
|
|
|
#define MIPS_TARGET_SYSCALL_H
|
2005-11-26 21:47:20 +03:00
|
|
|
|
|
|
|
/* this struct defines the way the registers are stored on the
|
|
|
|
stack during a system call. */
|
|
|
|
|
|
|
|
struct target_pt_regs {
|
|
|
|
/* Pad bytes for argument save space on the stack. */
|
2007-10-14 20:27:31 +04:00
|
|
|
abi_ulong pad0[6];
|
2005-11-26 21:47:20 +03:00
|
|
|
|
|
|
|
/* Saved main processor registers. */
|
2007-10-14 20:27:31 +04:00
|
|
|
abi_ulong regs[32];
|
2005-11-26 21:47:20 +03:00
|
|
|
|
|
|
|
/* Saved special registers. */
|
2007-10-14 20:27:31 +04:00
|
|
|
abi_ulong cp0_status;
|
|
|
|
abi_ulong lo;
|
|
|
|
abi_ulong hi;
|
|
|
|
abi_ulong cp0_badvaddr;
|
|
|
|
abi_ulong cp0_cause;
|
|
|
|
abi_ulong cp0_epc;
|
2005-11-26 21:47:20 +03:00
|
|
|
};
|
|
|
|
|
|
|
|
#define UNAME_MACHINE "mips"
|
2014-02-19 16:50:41 +04:00
|
|
|
#define UNAME_MINIMUM_RELEASE "2.6.32"
|
2013-07-16 21:44:57 +04:00
|
|
|
|
|
|
|
#define TARGET_CLONE_BACKWARDS
|
2020-08-11 19:45:51 +03:00
|
|
|
#define TARGET_MCL_CURRENT 1
|
|
|
|
#define TARGET_MCL_FUTURE 2
|
|
|
|
#define TARGET_MCL_ONFAULT 4
|
2016-02-01 21:38:42 +03:00
|
|
|
|
2016-07-11 18:48:11 +03:00
|
|
|
#define TARGET_FORCE_SHMLBA
|
|
|
|
|
|
|
|
static inline abi_ulong target_shmlba(CPUMIPSState *env)
|
|
|
|
{
|
|
|
|
return 0x40000;
|
|
|
|
}
|
|
|
|
|
2018-10-12 13:40:57 +03:00
|
|
|
/* MIPS-specific prctl() options */
|
|
|
|
#define TARGET_PR_SET_FP_MODE 45
|
|
|
|
#define TARGET_PR_GET_FP_MODE 46
|
2018-10-26 14:17:43 +03:00
|
|
|
#define TARGET_PR_FP_MODE_FR (1 << 0)
|
|
|
|
#define TARGET_PR_FP_MODE_FRE (1 << 1)
|
2018-10-12 13:40:57 +03:00
|
|
|
|
2016-06-29 11:47:26 +03:00
|
|
|
#endif /* MIPS_TARGET_SYSCALL_H */
|