2022-06-06 15:43:28 +03:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Loongarch LS7A Real Time Clock emulation
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*
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* Copyright (C) 2021 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "hw/sysbus.h"
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#include "hw/irq.h"
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#include "include/hw/register.h"
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#include "qemu/timer.h"
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#include "sysemu/sysemu.h"
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#include "qemu/cutils.h"
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#include "qemu/log.h"
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#include "migration/vmstate.h"
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#include "hw/misc/unimp.h"
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#include "sysemu/rtc.h"
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#include "hw/registerfields.h"
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#define SYS_TOYTRIM 0x20
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#define SYS_TOYWRITE0 0x24
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#define SYS_TOYWRITE1 0x28
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#define SYS_TOYREAD0 0x2C
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#define SYS_TOYREAD1 0x30
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#define SYS_TOYMATCH0 0x34
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#define SYS_TOYMATCH1 0x38
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#define SYS_TOYMATCH2 0x3C
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#define SYS_RTCCTRL 0x40
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#define SYS_RTCTRIM 0x60
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#define SYS_RTCWRTIE0 0x64
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#define SYS_RTCREAD0 0x68
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#define SYS_RTCMATCH0 0x6C
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#define SYS_RTCMATCH1 0x70
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#define SYS_RTCMATCH2 0x74
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#define LS7A_RTC_FREQ 32768
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#define TIMER_NUMS 3
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/*
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* Shift bits and filed mask
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*/
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FIELD(TOY, MON, 26, 6)
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FIELD(TOY, DAY, 21, 5)
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FIELD(TOY, HOUR, 16, 5)
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FIELD(TOY, MIN, 10, 6)
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FIELD(TOY, SEC, 4, 6)
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FIELD(TOY, MSEC, 0, 4)
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FIELD(TOY_MATCH, YEAR, 26, 6)
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FIELD(TOY_MATCH, MON, 22, 4)
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FIELD(TOY_MATCH, DAY, 17, 5)
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FIELD(TOY_MATCH, HOUR, 12, 5)
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FIELD(TOY_MATCH, MIN, 6, 6)
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FIELD(TOY_MATCH, SEC, 0, 6)
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FIELD(RTC_CTRL, RTCEN, 13, 1)
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FIELD(RTC_CTRL, TOYEN, 11, 1)
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FIELD(RTC_CTRL, EO, 8, 1)
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#define TYPE_LS7A_RTC "ls7a_rtc"
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OBJECT_DECLARE_SIMPLE_TYPE(LS7ARtcState, LS7A_RTC)
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struct LS7ARtcState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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/*
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* Needed to preserve the tick_count across migration, even if the
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* absolute value of the rtc_clock is different on the source and
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* destination.
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*/
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int64_t offset_toy;
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int64_t offset_rtc;
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int64_t data;
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int tidx;
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uint32_t toymatch[3];
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uint32_t toytrim;
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uint32_t cntrctl;
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uint32_t rtctrim;
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uint32_t rtccount;
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uint32_t rtcmatch[3];
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QEMUTimer *toy_timer[TIMER_NUMS];
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QEMUTimer *rtc_timer[TIMER_NUMS];
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qemu_irq irq;
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};
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/* switch nanoseconds time to rtc ticks */
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2022-07-05 11:25:43 +03:00
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static uint64_t ls7a_rtc_ticks(void)
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2022-06-06 15:43:28 +03:00
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{
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return qemu_clock_get_ns(rtc_clock) * LS7A_RTC_FREQ / NANOSECONDS_PER_SECOND;
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}
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/* switch rtc ticks to nanoseconds */
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2022-07-05 11:25:43 +03:00
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static uint64_t ticks_to_ns(uint64_t ticks)
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2022-06-06 15:43:28 +03:00
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{
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return ticks * NANOSECONDS_PER_SECOND / LS7A_RTC_FREQ;
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}
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2022-07-05 11:25:43 +03:00
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static bool toy_enabled(LS7ARtcState *s)
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2022-06-06 15:43:28 +03:00
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{
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return FIELD_EX32(s->cntrctl, RTC_CTRL, TOYEN) &&
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FIELD_EX32(s->cntrctl, RTC_CTRL, EO);
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}
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2022-07-05 11:25:43 +03:00
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static bool rtc_enabled(LS7ARtcState *s)
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2022-06-06 15:43:28 +03:00
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{
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return FIELD_EX32(s->cntrctl, RTC_CTRL, RTCEN) &&
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FIELD_EX32(s->cntrctl, RTC_CTRL, EO);
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}
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/* parse struct tm to toy value */
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2022-07-05 11:25:43 +03:00
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static uint64_t toy_time_to_val_mon(const struct tm *tm)
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2022-06-06 15:43:28 +03:00
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{
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uint64_t val = 0;
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2022-07-01 12:34:02 +03:00
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val = FIELD_DP32(val, TOY, MON, tm->tm_mon + 1);
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val = FIELD_DP32(val, TOY, DAY, tm->tm_mday);
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val = FIELD_DP32(val, TOY, HOUR, tm->tm_hour);
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val = FIELD_DP32(val, TOY, MIN, tm->tm_min);
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val = FIELD_DP32(val, TOY, SEC, tm->tm_sec);
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2022-06-06 15:43:28 +03:00
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return val;
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}
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2022-07-05 11:25:43 +03:00
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static void toymatch_val_to_time(LS7ARtcState *s, uint64_t val, struct tm *tm)
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2022-06-06 15:43:28 +03:00
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{
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2022-07-01 12:33:57 +03:00
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qemu_get_timedate(tm, s->offset_toy);
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2022-06-06 15:43:28 +03:00
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tm->tm_sec = FIELD_EX32(val, TOY_MATCH, SEC);
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tm->tm_min = FIELD_EX32(val, TOY_MATCH, MIN);
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tm->tm_hour = FIELD_EX32(val, TOY_MATCH, HOUR);
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tm->tm_mday = FIELD_EX32(val, TOY_MATCH, DAY);
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tm->tm_mon = FIELD_EX32(val, TOY_MATCH, MON) - 1;
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tm->tm_year += (FIELD_EX32(val, TOY_MATCH, YEAR) - (tm->tm_year & 0x3f));
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}
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2022-07-01 12:33:57 +03:00
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static void toymatch_write(LS7ARtcState *s, uint64_t val, int num)
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2022-06-06 15:43:28 +03:00
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{
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int64_t now, expire_time;
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2022-07-01 12:33:57 +03:00
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struct tm tm = {};
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2022-06-06 15:43:28 +03:00
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/* it do not support write when toy disabled */
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if (toy_enabled(s)) {
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s->toymatch[num] = val;
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2022-07-01 12:34:03 +03:00
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/* calculate expire time */
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2022-06-06 15:43:28 +03:00
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now = qemu_clock_get_ms(rtc_clock);
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2022-07-01 12:33:57 +03:00
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toymatch_val_to_time(s, val, &tm);
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expire_time = now + (qemu_timedate_diff(&tm) - s->offset_toy) * 1000;
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2022-06-06 15:43:28 +03:00
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timer_mod(s->toy_timer[num], expire_time);
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}
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}
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static void rtcmatch_write(LS7ARtcState *s, uint64_t val, int num)
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{
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uint64_t expire_ns;
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/* it do not support write when toy disabled */
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if (rtc_enabled(s)) {
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s->rtcmatch[num] = val;
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2022-07-01 12:34:03 +03:00
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/* calculate expire time */
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2022-06-06 15:43:28 +03:00
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expire_ns = ticks_to_ns(val) - ticks_to_ns(s->offset_rtc);
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timer_mod_ns(s->rtc_timer[num], expire_ns);
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}
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}
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static void ls7a_toy_stop(LS7ARtcState *s)
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{
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int i;
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2022-07-01 12:34:03 +03:00
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/* delete timers, and when re-enabled, recalculate expire time */
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2022-06-06 15:43:28 +03:00
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for (i = 0; i < TIMER_NUMS; i++) {
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timer_del(s->toy_timer[i]);
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}
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}
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static void ls7a_rtc_stop(LS7ARtcState *s)
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{
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int i;
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2022-07-01 12:34:03 +03:00
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/* delete timers, and when re-enabled, recalculate expire time */
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2022-06-06 15:43:28 +03:00
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for (i = 0; i < TIMER_NUMS; i++) {
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timer_del(s->rtc_timer[i]);
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}
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}
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static void ls7a_toy_start(LS7ARtcState *s)
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{
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int i;
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uint64_t expire_time, now;
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2022-07-01 12:33:57 +03:00
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struct tm tm = {};
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2022-06-06 15:43:28 +03:00
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now = qemu_clock_get_ms(rtc_clock);
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2022-07-01 12:34:03 +03:00
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/* recalculate expire time and enable timer */
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2022-06-06 15:43:28 +03:00
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for (i = 0; i < TIMER_NUMS; i++) {
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2022-07-01 12:33:57 +03:00
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toymatch_val_to_time(s, s->toymatch[i], &tm);
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2022-06-06 15:43:28 +03:00
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expire_time = now + (qemu_timedate_diff(&tm) - s->offset_toy) * 1000;
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timer_mod(s->toy_timer[i], expire_time);
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}
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}
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static void ls7a_rtc_start(LS7ARtcState *s)
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{
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int i;
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2022-07-01 12:34:01 +03:00
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uint64_t expire_time;
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2022-06-06 15:43:28 +03:00
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2022-07-01 12:34:03 +03:00
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/* recalculate expire time and enable timer */
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2022-06-06 15:43:28 +03:00
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for (i = 0; i < TIMER_NUMS; i++) {
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expire_time = ticks_to_ns(s->rtcmatch[i]) - ticks_to_ns(s->offset_rtc);
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timer_mod_ns(s->rtc_timer[i], expire_time);
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}
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}
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static uint64_t ls7a_rtc_read(void *opaque, hwaddr addr, unsigned size)
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{
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LS7ARtcState *s = LS7A_RTC(opaque);
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struct tm tm;
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int val = 0;
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switch (addr) {
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case SYS_TOYREAD0:
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if (toy_enabled(s)) {
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qemu_get_timedate(&tm, s->offset_toy);
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2022-07-01 12:34:02 +03:00
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val = toy_time_to_val_mon(&tm);
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2022-06-06 15:43:28 +03:00
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} else {
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2022-07-01 12:34:01 +03:00
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/* return 0 when toy disabled */
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val = 0;
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2022-06-06 15:43:28 +03:00
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}
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break;
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case SYS_TOYREAD1:
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if (toy_enabled(s)) {
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qemu_get_timedate(&tm, s->offset_toy);
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val = tm.tm_year;
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} else {
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2022-07-01 12:34:01 +03:00
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/* return 0 when toy disabled */
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val = 0;
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2022-06-06 15:43:28 +03:00
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}
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break;
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case SYS_TOYMATCH0:
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val = s->toymatch[0];
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break;
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case SYS_TOYMATCH1:
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val = s->toymatch[1];
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break;
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case SYS_TOYMATCH2:
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val = s->toymatch[2];
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break;
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case SYS_RTCCTRL:
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val = s->cntrctl;
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break;
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case SYS_RTCREAD0:
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if (rtc_enabled(s)) {
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val = ls7a_rtc_ticks() + s->offset_rtc;
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} else {
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2022-07-01 12:34:01 +03:00
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/* return 0 when rtc disabled */
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val = 0;
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2022-06-06 15:43:28 +03:00
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}
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break;
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case SYS_RTCMATCH0:
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val = s->rtcmatch[0];
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break;
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case SYS_RTCMATCH1:
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val = s->rtcmatch[1];
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break;
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case SYS_RTCMATCH2:
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val = s->rtcmatch[2];
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break;
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default:
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val = 0;
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break;
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}
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return val;
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}
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static void ls7a_rtc_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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int old_toyen, old_rtcen, new_toyen, new_rtcen;
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LS7ARtcState *s = LS7A_RTC(opaque);
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struct tm tm;
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switch (addr) {
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case SYS_TOYWRITE0:
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/* it do not support write when toy disabled */
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if (toy_enabled(s)) {
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qemu_get_timedate(&tm, s->offset_toy);
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tm.tm_sec = FIELD_EX32(val, TOY, SEC);
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tm.tm_min = FIELD_EX32(val, TOY, MIN);
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tm.tm_hour = FIELD_EX32(val, TOY, HOUR);
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tm.tm_mday = FIELD_EX32(val, TOY, DAY);
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tm.tm_mon = FIELD_EX32(val, TOY, MON) - 1;
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s->offset_toy = qemu_timedate_diff(&tm);
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}
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break;
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case SYS_TOYWRITE1:
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if (toy_enabled(s)) {
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qemu_get_timedate(&tm, s->offset_toy);
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tm.tm_year = val;
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s->offset_toy = qemu_timedate_diff(&tm);
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}
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break;
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case SYS_TOYMATCH0:
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2022-07-01 12:33:57 +03:00
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toymatch_write(s, val, 0);
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2022-06-06 15:43:28 +03:00
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break;
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case SYS_TOYMATCH1:
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2022-07-01 12:33:57 +03:00
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toymatch_write(s, val, 1);
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2022-06-06 15:43:28 +03:00
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break;
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case SYS_TOYMATCH2:
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2022-07-01 12:33:57 +03:00
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toymatch_write(s, val, 2);
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2022-06-06 15:43:28 +03:00
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break;
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case SYS_RTCCTRL:
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/* get old ctrl */
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old_toyen = toy_enabled(s);
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old_rtcen = rtc_enabled(s);
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s->cntrctl = val;
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/* get new ctrl */
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new_toyen = toy_enabled(s);
|
|
|
|
new_rtcen = rtc_enabled(s);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* we do not consider if EO changed, as it always set at most time.
|
|
|
|
* toy or rtc enabled should start timer. otherwise, stop timer
|
|
|
|
*/
|
|
|
|
if (old_toyen != new_toyen) {
|
|
|
|
if (new_toyen) {
|
|
|
|
ls7a_toy_start(s);
|
|
|
|
} else {
|
|
|
|
ls7a_toy_stop(s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (old_rtcen != new_rtcen) {
|
|
|
|
if (new_rtcen) {
|
|
|
|
ls7a_rtc_start(s);
|
|
|
|
} else {
|
|
|
|
ls7a_rtc_stop(s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case SYS_RTCWRTIE0:
|
|
|
|
if (rtc_enabled(s)) {
|
|
|
|
s->offset_rtc = val - ls7a_rtc_ticks();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case SYS_RTCMATCH0:
|
|
|
|
rtcmatch_write(s, val, 0);
|
|
|
|
break;
|
|
|
|
case SYS_RTCMATCH1:
|
|
|
|
rtcmatch_write(s, val, 1);
|
|
|
|
break;
|
|
|
|
case SYS_RTCMATCH2:
|
|
|
|
rtcmatch_write(s, val, 2);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const MemoryRegionOps ls7a_rtc_ops = {
|
|
|
|
.read = ls7a_rtc_read,
|
|
|
|
.write = ls7a_rtc_write,
|
|
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
|
|
.valid = {
|
|
|
|
.min_access_size = 4,
|
|
|
|
.max_access_size = 4,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static void toy_timer_cb(void *opaque)
|
|
|
|
{
|
|
|
|
LS7ARtcState *s = opaque;
|
|
|
|
|
|
|
|
if (toy_enabled(s)) {
|
2022-07-01 12:33:58 +03:00
|
|
|
qemu_irq_raise(s->irq);
|
2022-06-06 15:43:28 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void rtc_timer_cb(void *opaque)
|
|
|
|
{
|
|
|
|
LS7ARtcState *s = opaque;
|
|
|
|
|
|
|
|
if (rtc_enabled(s)) {
|
2022-07-01 12:33:58 +03:00
|
|
|
qemu_irq_raise(s->irq);
|
2022-06-06 15:43:28 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ls7a_rtc_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
|
|
|
|
LS7ARtcState *d = LS7A_RTC(sbd);
|
|
|
|
memory_region_init_io(&d->iomem, NULL, &ls7a_rtc_ops,
|
|
|
|
(void *)d, "ls7a_rtc", 0x100);
|
|
|
|
|
|
|
|
sysbus_init_irq(sbd, &d->irq);
|
|
|
|
|
|
|
|
sysbus_init_mmio(sbd, &d->iomem);
|
|
|
|
for (i = 0; i < TIMER_NUMS; i++) {
|
|
|
|
d->toymatch[i] = 0;
|
|
|
|
d->rtcmatch[i] = 0;
|
|
|
|
d->toy_timer[i] = timer_new_ms(rtc_clock, toy_timer_cb, d);
|
|
|
|
d->rtc_timer[i] = timer_new_ms(rtc_clock, rtc_timer_cb, d);
|
|
|
|
}
|
|
|
|
d->offset_toy = 0;
|
|
|
|
d->offset_rtc = 0;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2022-07-01 12:34:00 +03:00
|
|
|
/* delete timer and clear reg when reset */
|
|
|
|
static void ls7a_rtc_reset(DeviceState *dev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
|
|
|
|
LS7ARtcState *d = LS7A_RTC(sbd);
|
|
|
|
for (i = 0; i < TIMER_NUMS; i++) {
|
|
|
|
if (toy_enabled(d)) {
|
|
|
|
timer_del(d->toy_timer[i]);
|
|
|
|
}
|
|
|
|
if (rtc_enabled(d)) {
|
|
|
|
timer_del(d->rtc_timer[i]);
|
|
|
|
}
|
|
|
|
d->toymatch[i] = 0;
|
|
|
|
d->rtcmatch[i] = 0;
|
|
|
|
}
|
|
|
|
d->cntrctl = 0;
|
|
|
|
}
|
|
|
|
|
2022-06-06 15:43:28 +03:00
|
|
|
static int ls7a_rtc_pre_save(void *opaque)
|
|
|
|
{
|
|
|
|
LS7ARtcState *s = LS7A_RTC(opaque);
|
|
|
|
|
|
|
|
ls7a_toy_stop(s);
|
|
|
|
ls7a_rtc_stop(s);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ls7a_rtc_post_load(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
LS7ARtcState *s = LS7A_RTC(opaque);
|
|
|
|
if (toy_enabled(s)) {
|
|
|
|
ls7a_toy_start(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rtc_enabled(s)) {
|
|
|
|
ls7a_rtc_start(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_ls7a_rtc = {
|
|
|
|
.name = "ls7a_rtc",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.pre_save = ls7a_rtc_pre_save,
|
|
|
|
.post_load = ls7a_rtc_post_load,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_INT64(offset_toy, LS7ARtcState),
|
|
|
|
VMSTATE_INT64(offset_rtc, LS7ARtcState),
|
|
|
|
VMSTATE_UINT32_ARRAY(toymatch, LS7ARtcState, TIMER_NUMS),
|
|
|
|
VMSTATE_UINT32_ARRAY(rtcmatch, LS7ARtcState, TIMER_NUMS),
|
|
|
|
VMSTATE_UINT32(cntrctl, LS7ARtcState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static void ls7a_rtc_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
dc->vmsd = &vmstate_ls7a_rtc;
|
|
|
|
dc->realize = ls7a_rtc_realize;
|
2022-07-01 12:34:00 +03:00
|
|
|
dc->reset = ls7a_rtc_reset;
|
2022-06-06 15:43:28 +03:00
|
|
|
dc->desc = "ls7a rtc";
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo ls7a_rtc_info = {
|
|
|
|
.name = TYPE_LS7A_RTC,
|
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
|
|
.instance_size = sizeof(LS7ARtcState),
|
|
|
|
.class_init = ls7a_rtc_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void ls7a_rtc_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&ls7a_rtc_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(ls7a_rtc_register_types)
|