2003-08-09 03:58:05 +04:00
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/*
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* Software MMU support
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2007-09-17 01:08:06 +04:00
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*
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2003-08-09 03:58:05 +04:00
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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2009-07-17 00:47:01 +04:00
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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2003-08-09 03:58:05 +04:00
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*/
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#if DATA_SIZE == 8
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#define SUFFIX q
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2003-10-28 00:22:23 +03:00
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#define USUFFIX q
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2003-08-09 03:58:05 +04:00
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#define DATA_TYPE uint64_t
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#elif DATA_SIZE == 4
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#define SUFFIX l
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2003-10-28 00:22:23 +03:00
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#define USUFFIX l
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2003-08-09 03:58:05 +04:00
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#define DATA_TYPE uint32_t
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#elif DATA_SIZE == 2
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#define SUFFIX w
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2003-10-28 00:22:23 +03:00
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#define USUFFIX uw
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2003-08-09 03:58:05 +04:00
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#define DATA_TYPE uint16_t
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#define DATA_STYPE int16_t
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#elif DATA_SIZE == 1
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#define SUFFIX b
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#define USUFFIX ub
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2003-08-09 03:58:05 +04:00
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#define DATA_TYPE uint8_t
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#define DATA_STYPE int8_t
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#else
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#error unsupported data size
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#endif
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2007-10-14 11:07:08 +04:00
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#if ACCESS_TYPE < (NB_MMU_MODES)
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2003-10-28 00:22:23 +03:00
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2007-10-14 11:07:08 +04:00
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#define CPU_MMU_INDEX ACCESS_TYPE
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2003-10-28 00:22:23 +03:00
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#define MMUSUFFIX _mmu
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2007-10-14 11:07:08 +04:00
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#elif ACCESS_TYPE == (NB_MMU_MODES)
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2003-10-28 00:22:23 +03:00
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2007-10-14 11:07:08 +04:00
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#define CPU_MMU_INDEX (cpu_mmu_index(env))
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2003-10-28 00:22:23 +03:00
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#define MMUSUFFIX _mmu
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2007-10-14 11:07:08 +04:00
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#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
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2003-10-28 00:22:23 +03:00
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2007-10-14 11:07:08 +04:00
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#define CPU_MMU_INDEX (cpu_mmu_index(env))
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2003-10-28 00:22:23 +03:00
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#define MMUSUFFIX _cmmu
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2003-08-09 03:58:05 +04:00
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#else
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2003-10-28 00:22:23 +03:00
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#error invalid ACCESS_TYPE
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2003-08-09 03:58:05 +04:00
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#endif
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#if DATA_SIZE == 8
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#define RES_TYPE uint64_t
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#else
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2010-06-02 00:12:32 +04:00
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#define RES_TYPE uint32_t
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2003-08-09 03:58:05 +04:00
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#endif
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2007-10-14 11:07:08 +04:00
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#if ACCESS_TYPE == (NB_MMU_MODES + 1)
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2005-11-29 00:19:04 +03:00
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#define ADDR_READ addr_code
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#else
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#define ADDR_READ addr_read
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#endif
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2003-08-09 03:58:05 +04:00
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2004-01-04 21:15:29 +03:00
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/* generic load/store macros */
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2005-01-04 02:35:10 +03:00
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static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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2003-08-09 03:58:05 +04:00
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{
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int page_index;
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2003-08-09 03:58:05 +04:00
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RES_TYPE res;
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2005-01-04 02:35:10 +03:00
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target_ulong addr;
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unsigned long physaddr;
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2007-10-14 11:07:08 +04:00
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int mmu_idx;
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2003-10-28 00:22:23 +03:00
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2005-01-04 02:35:10 +03:00
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addr = ptr;
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2008-05-10 14:14:22 +04:00
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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2007-10-14 11:07:08 +04:00
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mmu_idx = CPU_MMU_INDEX;
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2008-07-03 21:57:36 +04:00
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if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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2007-10-14 11:07:08 +04:00
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res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
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2003-08-09 03:58:05 +04:00
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} else {
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2008-05-10 14:14:22 +04:00
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physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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2003-10-28 00:22:23 +03:00
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res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
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2003-08-09 03:58:05 +04:00
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}
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return res;
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}
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#if DATA_SIZE <= 2
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2005-01-04 02:35:10 +03:00
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static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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2003-08-09 03:58:05 +04:00
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{
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2008-05-10 14:14:22 +04:00
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int res, page_index;
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2005-01-04 02:35:10 +03:00
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target_ulong addr;
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unsigned long physaddr;
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2007-10-14 11:07:08 +04:00
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int mmu_idx;
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2003-10-28 00:22:23 +03:00
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2005-01-04 02:35:10 +03:00
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addr = ptr;
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2008-05-10 14:14:22 +04:00
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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2007-10-14 11:07:08 +04:00
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mmu_idx = CPU_MMU_INDEX;
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2008-07-03 21:57:36 +04:00
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if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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2007-10-14 11:07:08 +04:00
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res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
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} else {
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2008-05-10 14:14:22 +04:00
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physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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2003-08-09 03:58:05 +04:00
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res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
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}
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return res;
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}
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#endif
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2007-10-14 11:07:08 +04:00
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#if ACCESS_TYPE != (NB_MMU_MODES + 1)
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2005-11-29 00:19:04 +03:00
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2004-01-04 21:15:29 +03:00
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/* generic store macro */
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2005-01-04 02:35:10 +03:00
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static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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2003-08-09 03:58:05 +04:00
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{
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2008-05-10 14:14:22 +04:00
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int page_index;
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2005-01-04 02:35:10 +03:00
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target_ulong addr;
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unsigned long physaddr;
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2007-10-14 11:07:08 +04:00
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int mmu_idx;
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2003-10-28 00:22:23 +03:00
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2005-01-04 02:35:10 +03:00
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addr = ptr;
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2008-05-10 14:14:22 +04:00
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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2007-10-14 11:07:08 +04:00
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mmu_idx = CPU_MMU_INDEX;
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2008-07-03 21:57:36 +04:00
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if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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2007-10-14 11:07:08 +04:00
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glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
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2003-08-09 03:58:05 +04:00
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} else {
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2008-05-10 14:14:22 +04:00
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physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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2003-08-09 03:58:05 +04:00
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glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
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}
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}
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2007-10-14 11:07:08 +04:00
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#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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2005-11-29 00:19:04 +03:00
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2007-10-14 11:07:08 +04:00
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#if ACCESS_TYPE != (NB_MMU_MODES + 1)
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2004-01-04 21:15:29 +03:00
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2004-01-05 02:56:24 +03:00
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#if DATA_SIZE == 8
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2005-11-06 22:56:23 +03:00
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static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
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2004-01-05 02:56:24 +03:00
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{
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union {
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2005-11-06 22:56:23 +03:00
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float64 d;
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2004-01-05 02:56:24 +03:00
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uint64_t i;
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} u;
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u.i = glue(ldq, MEMSUFFIX)(ptr);
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return u.d;
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}
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2005-11-06 22:56:23 +03:00
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static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
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2004-01-05 02:56:24 +03:00
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{
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union {
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2005-11-06 22:56:23 +03:00
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float64 d;
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2004-01-05 02:56:24 +03:00
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uint64_t i;
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} u;
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u.d = v;
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glue(stq, MEMSUFFIX)(ptr, u.i);
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}
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#endif /* DATA_SIZE == 8 */
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#if DATA_SIZE == 4
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2005-11-06 22:56:23 +03:00
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static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
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2004-01-05 02:56:24 +03:00
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{
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union {
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2005-11-06 22:56:23 +03:00
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float32 f;
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2004-01-05 02:56:24 +03:00
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uint32_t i;
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} u;
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u.i = glue(ldl, MEMSUFFIX)(ptr);
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return u.f;
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}
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2005-11-06 22:56:23 +03:00
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static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
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2004-01-05 02:56:24 +03:00
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{
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union {
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2005-11-06 22:56:23 +03:00
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float32 f;
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2004-01-05 02:56:24 +03:00
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uint32_t i;
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} u;
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u.f = v;
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glue(stl, MEMSUFFIX)(ptr, u.i);
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}
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#endif /* DATA_SIZE == 4 */
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2007-10-14 11:07:08 +04:00
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#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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2005-11-29 00:19:04 +03:00
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2003-08-09 03:58:05 +04:00
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#undef RES_TYPE
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#undef DATA_TYPE
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#undef DATA_STYPE
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#undef SUFFIX
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2003-10-28 00:22:23 +03:00
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#undef USUFFIX
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2003-08-09 03:58:05 +04:00
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#undef DATA_SIZE
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2007-10-14 11:07:08 +04:00
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#undef CPU_MMU_INDEX
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2003-10-28 00:22:23 +03:00
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#undef MMUSUFFIX
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2005-11-29 00:19:04 +03:00
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#undef ADDR_READ
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