2023-06-15 03:03:37 +03:00
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/*
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* QEMU ARM Xen PVH Machine
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*
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2024-08-08 23:09:14 +03:00
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* SPDX-License-Identifier: MIT
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2023-06-15 03:03:37 +03:00
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*/
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#include "qemu/osdep.h"
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#include "qemu/error-report.h"
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#include "qapi/qapi-commands-migration.h"
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#include "hw/boards.h"
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#include "sysemu/sysemu.h"
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2024-08-08 14:58:52 +03:00
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#include "hw/xen/xen-pvh-common.h"
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2023-06-15 03:03:37 +03:00
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#include "hw/xen/arch_hvm.h"
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#define TYPE_XEN_ARM MACHINE_TYPE_NAME("xenpvh")
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2023-08-30 07:35:18 +03:00
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2023-08-30 07:35:17 +03:00
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/*
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* VIRTIO_MMIO_DEV_SIZE is imported from tools/libs/light/libxl_arm.c under Xen
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* repository.
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*
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* Origin: git://xenbits.xen.org/xen.git 2128143c114c
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*/
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#define VIRTIO_MMIO_DEV_SIZE 0x200
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#define NR_VIRTIO_MMIO_DEVICES \
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(GUEST_VIRTIO_MMIO_SPI_LAST - GUEST_VIRTIO_MMIO_SPI_FIRST)
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2024-08-08 14:58:52 +03:00
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static void xen_arm_instance_init(Object *obj)
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2023-08-30 07:35:18 +03:00
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{
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2024-08-08 14:58:52 +03:00
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XenPVHMachineState *s = XEN_PVH_MACHINE(obj);
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2023-08-30 07:35:18 +03:00
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2024-08-08 14:58:52 +03:00
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/* Default values. */
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s->cfg.ram_low = (MemMapEntry) { GUEST_RAM0_BASE, GUEST_RAM0_SIZE };
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s->cfg.ram_high = (MemMapEntry) { GUEST_RAM1_BASE, GUEST_RAM1_SIZE };
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2023-08-30 07:35:18 +03:00
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2024-08-08 14:58:52 +03:00
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s->cfg.virtio_mmio_num = NR_VIRTIO_MMIO_DEVICES;
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s->cfg.virtio_mmio_irq_base = GUEST_VIRTIO_MMIO_SPI_FIRST;
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s->cfg.virtio_mmio = (MemMapEntry) { GUEST_VIRTIO_MMIO_BASE,
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VIRTIO_MMIO_DEV_SIZE };
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2023-08-30 07:35:18 +03:00
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}
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2024-09-06 16:05:51 +03:00
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static void xen_pvh_set_pci_intx_irq(void *opaque, int intx_irq, int level)
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{
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XenPVHMachineState *s = XEN_PVH_MACHINE(opaque);
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int irq = s->cfg.pci_intx_irq_base + intx_irq;
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if (xendevicemodel_set_irq_level(xen_dmod, xen_domid, irq, level)) {
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error_report("xendevicemodel_set_pci_intx_level failed");
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}
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}
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2023-06-15 03:03:37 +03:00
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static void xen_arm_machine_class_init(ObjectClass *oc, void *data)
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{
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2024-08-08 14:58:52 +03:00
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XenPVHMachineClass *xpc = XEN_PVH_MACHINE_CLASS(oc);
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2023-06-15 03:03:37 +03:00
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MachineClass *mc = MACHINE_CLASS(oc);
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2024-08-08 14:58:52 +03:00
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2024-08-08 23:30:53 +03:00
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mc->desc = "Xen PVH ARM machine";
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2024-08-08 14:30:12 +03:00
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/*
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* mc->max_cpus holds the MAX value allowed in the -smp command-line opts.
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*
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* 1. If users don't pass any -smp option:
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* ms->smp.cpus will default to 1.
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* ms->smp.max_cpus will default to 1.
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*
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* 2. If users pass -smp X:
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* ms->smp.cpus will be set to X.
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* ms->smp.max_cpus will also be set to X.
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*
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* 3. If users pass -smp X,maxcpus=Y:
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* ms->smp.cpus will be set to X.
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* ms->smp.max_cpus will be set to Y.
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*
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* In scenarios 2 and 3, if X or Y are set to something larger than
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* mc->max_cpus, QEMU will bail out with an error message.
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*/
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mc->max_cpus = GUEST_MAX_VCPUS;
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2023-06-15 03:03:37 +03:00
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2024-09-05 02:00:36 +03:00
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/* Xen/ARM does not use buffered IOREQs. */
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xpc->handle_bufioreq = HVM_IOREQSRV_BUFIOREQ_OFF;
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2024-09-06 16:05:51 +03:00
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/* PCI INTX delivery. */
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xpc->set_pci_intx_irq = xen_pvh_set_pci_intx_irq;
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2024-08-08 14:58:52 +03:00
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/* List of supported features known to work on PVH ARM. */
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2024-09-06 16:05:51 +03:00
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xpc->has_pci = true;
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2024-08-08 14:58:52 +03:00
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xpc->has_tpm = true;
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xpc->has_virtio_mmio = true;
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2023-06-15 03:03:37 +03:00
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2024-08-08 14:58:52 +03:00
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xen_pvh_class_setup_common_props(xpc);
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2023-06-15 03:03:37 +03:00
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}
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static const TypeInfo xen_arm_machine_type = {
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.name = TYPE_XEN_ARM,
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2024-08-08 14:58:52 +03:00
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.parent = TYPE_XEN_PVH_MACHINE,
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2023-06-15 03:03:37 +03:00
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.class_init = xen_arm_machine_class_init,
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2024-08-08 14:58:52 +03:00
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.instance_size = sizeof(XenPVHMachineState),
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.instance_init = xen_arm_instance_init,
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2023-06-15 03:03:37 +03:00
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};
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static void xen_arm_machine_register_types(void)
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{
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type_register_static(&xen_arm_machine_type);
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}
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type_init(xen_arm_machine_register_types)
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