100 lines
3.0 KiB
C
100 lines
3.0 KiB
C
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/*
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* Allwinner Sun8i Ethernet MAC emulation
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*
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* Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_NET_ALLWINNER_SUN8I_EMAC_H
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#define HW_NET_ALLWINNER_SUN8I_EMAC_H
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#include "qom/object.h"
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#include "net/net.h"
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#include "hw/sysbus.h"
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/**
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* Object model
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* @{
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*/
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#define TYPE_AW_SUN8I_EMAC "allwinner-sun8i-emac"
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#define AW_SUN8I_EMAC(obj) \
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OBJECT_CHECK(AwSun8iEmacState, (obj), TYPE_AW_SUN8I_EMAC)
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/** @} */
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/**
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* Allwinner Sun8i EMAC object instance state
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*/
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typedef struct AwSun8iEmacState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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/** Maps I/O registers in physical memory */
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MemoryRegion iomem;
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/** Interrupt output signal to notify CPU */
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qemu_irq irq;
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/** Generic Network Interface Controller (NIC) for networking API */
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NICState *nic;
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/** Generic Network Interface Controller (NIC) configuration */
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NICConf conf;
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/**
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* @name Media Independent Interface (MII)
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* @{
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*/
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uint8_t mii_phy_addr; /**< PHY address */
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uint32_t mii_cr; /**< Control */
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uint32_t mii_st; /**< Status */
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uint32_t mii_adv; /**< Advertised Abilities */
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/** @} */
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/**
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* @name Hardware Registers
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* @{
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*/
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uint32_t basic_ctl0; /**< Basic Control 0 */
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uint32_t basic_ctl1; /**< Basic Control 1 */
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uint32_t int_en; /**< Interrupt Enable */
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uint32_t int_sta; /**< Interrupt Status */
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uint32_t frm_flt; /**< Receive Frame Filter */
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uint32_t rx_ctl0; /**< Receive Control 0 */
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uint32_t rx_ctl1; /**< Receive Control 1 */
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uint32_t rx_desc_head; /**< Receive Descriptor List Address */
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uint32_t rx_desc_curr; /**< Current Receive Descriptor Address */
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uint32_t tx_ctl0; /**< Transmit Control 0 */
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uint32_t tx_ctl1; /**< Transmit Control 1 */
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uint32_t tx_desc_head; /**< Transmit Descriptor List Address */
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uint32_t tx_desc_curr; /**< Current Transmit Descriptor Address */
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uint32_t tx_flowctl; /**< Transmit Flow Control */
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uint32_t mii_cmd; /**< Management Interface Command */
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uint32_t mii_data; /**< Management Interface Data */
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/** @} */
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} AwSun8iEmacState;
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#endif /* HW_NET_ALLWINNER_SUN8I_H */
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