2013-07-07 14:54:12 +04:00
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/*
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* s390x gdb server stub
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2013 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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2019-01-29 16:37:47 +03:00
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* version 2.1 of the License, or (at your option) any later version.
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2013-07-07 14:54:12 +04:00
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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2019-05-23 17:35:05 +03:00
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2016-01-26 21:17:00 +03:00
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#include "qemu/osdep.h"
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2016-03-15 18:58:45 +03:00
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#include "cpu.h"
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2021-07-07 13:53:16 +03:00
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#include "s390x-internal.h"
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2016-03-15 15:18:37 +03:00
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#include "exec/exec-all.h"
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2013-06-29 06:18:45 +04:00
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#include "exec/gdbstub.h"
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2023-03-03 05:57:56 +03:00
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#include "gdbstub/helpers.h"
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2013-06-29 06:18:45 +04:00
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#include "qemu/bitops.h"
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2017-01-10 13:59:55 +03:00
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#include "sysemu/hw_accel.h"
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2019-05-23 17:35:05 +03:00
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#include "sysemu/tcg.h"
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2013-07-07 14:54:12 +04:00
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2020-03-16 20:21:41 +03:00
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int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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2013-07-07 14:54:12 +04:00
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{
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2024-01-29 19:45:06 +03:00
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CPUS390XState *env = cpu_env(cs);
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2013-07-07 14:54:12 +04:00
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switch (n) {
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case S390_PSWM_REGNUM:
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2021-06-15 06:07:43 +03:00
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return gdb_get_regl(mem_buf, s390_cpu_get_psw_mask(env));
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2013-07-07 14:54:12 +04:00
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case S390_PSWA_REGNUM:
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2013-07-07 15:05:05 +04:00
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return gdb_get_regl(mem_buf, env->psw.addr);
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2013-07-07 14:54:12 +04:00
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case S390_R0_REGNUM ... S390_R15_REGNUM:
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2014-08-29 17:52:17 +04:00
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return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
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2013-07-07 14:54:12 +04:00
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}
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return 0;
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}
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2013-06-29 06:18:45 +04:00
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int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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2013-07-07 14:54:12 +04:00
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{
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2024-01-29 19:45:06 +03:00
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CPUS390XState *env = cpu_env(cs);
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2014-08-29 17:52:16 +04:00
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target_ulong tmpl = ldtul_p(mem_buf);
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2013-07-07 14:54:12 +04:00
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switch (n) {
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case S390_PSWM_REGNUM:
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2021-06-15 06:07:43 +03:00
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s390_cpu_set_psw(env, tmpl, env->psw.addr);
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2013-07-07 14:54:12 +04:00
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break;
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case S390_PSWA_REGNUM:
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env->psw.addr = tmpl;
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break;
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case S390_R0_REGNUM ... S390_R15_REGNUM:
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2014-08-29 17:52:17 +04:00
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env->regs[n - S390_R0_REGNUM] = tmpl;
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2013-07-07 14:54:12 +04:00
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break;
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2014-08-29 17:52:16 +04:00
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default:
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return 0;
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}
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return 8;
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}
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/* the values represent the positions in s390-acr.xml */
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#define S390_A0_REGNUM 0
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#define S390_A15_REGNUM 15
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2020-03-16 20:21:41 +03:00
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static int cpu_read_ac_reg(CPUS390XState *env, GByteArray *buf, int n)
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2014-08-29 17:52:16 +04:00
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{
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switch (n) {
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2013-07-07 14:54:12 +04:00
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case S390_A0_REGNUM ... S390_A15_REGNUM:
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2020-03-16 20:21:41 +03:00
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return gdb_get_reg32(buf, env->aregs[n]);
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2014-08-29 17:52:16 +04:00
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default:
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return 0;
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}
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}
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static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_A0_REGNUM ... S390_A15_REGNUM:
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env->aregs[n] = ldl_p(mem_buf);
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2019-03-23 02:07:18 +03:00
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cpu_synchronize_post_init(env_cpu(env));
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2014-08-29 17:52:16 +04:00
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return 4;
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default:
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return 0;
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}
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}
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/* the values represent the positions in s390-fpr.xml */
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#define S390_FPC_REGNUM 0
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#define S390_F0_REGNUM 1
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#define S390_F15_REGNUM 16
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2020-03-16 20:21:41 +03:00
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static int cpu_read_fp_reg(CPUS390XState *env, GByteArray *buf, int n)
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2014-08-29 17:52:16 +04:00
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{
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switch (n) {
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2013-07-07 14:54:12 +04:00
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case S390_FPC_REGNUM:
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2020-03-16 20:21:41 +03:00
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return gdb_get_reg32(buf, env->fpc);
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2013-07-07 14:54:12 +04:00
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case S390_F0_REGNUM ... S390_F15_REGNUM:
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2020-03-16 20:21:41 +03:00
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return gdb_get_reg64(buf, *get_freg(env, n - S390_F0_REGNUM));
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2013-07-07 14:54:12 +04:00
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default:
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return 0;
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}
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2014-08-29 17:52:16 +04:00
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}
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static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_FPC_REGNUM:
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env->fpc = ldl_p(mem_buf);
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return 4;
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case S390_F0_REGNUM ... S390_F15_REGNUM:
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2019-05-29 10:15:38 +03:00
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*get_freg(env, n - S390_F0_REGNUM) = ldtul_p(mem_buf);
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2014-08-29 17:52:16 +04:00
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return 8;
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default:
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return 0;
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}
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}
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2014-06-03 16:42:18 +04:00
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/* the values represent the positions in s390-vx.xml */
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#define S390_V0L_REGNUM 0
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#define S390_V15L_REGNUM 15
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#define S390_V16_REGNUM 16
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#define S390_V31_REGNUM 31
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2020-03-16 20:21:41 +03:00
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static int cpu_read_vreg(CPUS390XState *env, GByteArray *buf, int n)
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2014-06-03 16:42:18 +04:00
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{
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int ret;
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switch (n) {
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case S390_V0L_REGNUM ... S390_V15L_REGNUM:
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2020-03-16 20:21:41 +03:00
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ret = gdb_get_reg64(buf, env->vregs[n][1]);
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2014-06-03 16:42:18 +04:00
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break;
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case S390_V16_REGNUM ... S390_V31_REGNUM:
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2020-03-16 20:21:41 +03:00
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ret = gdb_get_reg64(buf, env->vregs[n][0]);
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ret += gdb_get_reg64(buf, env->vregs[n][1]);
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2014-06-03 16:42:18 +04:00
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break;
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default:
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ret = 0;
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}
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return ret;
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}
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static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_V0L_REGNUM ... S390_V15L_REGNUM:
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2019-05-29 10:15:38 +03:00
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env->vregs[n][1] = ldtul_p(mem_buf + 8);
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2014-06-03 16:42:18 +04:00
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return 8;
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case S390_V16_REGNUM ... S390_V31_REGNUM:
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2019-05-29 10:15:38 +03:00
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env->vregs[n][0] = ldtul_p(mem_buf);
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env->vregs[n][1] = ldtul_p(mem_buf + 8);
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2014-06-03 16:42:18 +04:00
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return 16;
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default:
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return 0;
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}
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}
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2015-06-23 12:00:09 +03:00
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/* the values represent the positions in s390-cr.xml */
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#define S390_C0_REGNUM 0
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#define S390_C15_REGNUM 15
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#ifndef CONFIG_USER_ONLY
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2020-03-16 20:21:41 +03:00
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static int cpu_read_c_reg(CPUS390XState *env, GByteArray *buf, int n)
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2015-06-23 12:00:09 +03:00
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{
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switch (n) {
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case S390_C0_REGNUM ... S390_C15_REGNUM:
|
2020-03-16 20:21:41 +03:00
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return gdb_get_regl(buf, env->cregs[n]);
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2015-06-23 12:00:09 +03:00
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default:
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return 0;
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}
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}
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static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_C0_REGNUM ... S390_C15_REGNUM:
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env->cregs[n] = ldtul_p(mem_buf);
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if (tcg_enabled()) {
|
2019-03-23 02:07:18 +03:00
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tlb_flush(env_cpu(env));
|
2015-06-23 12:00:09 +03:00
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}
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2019-03-23 02:07:18 +03:00
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cpu_synchronize_post_init(env_cpu(env));
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2015-06-23 12:00:09 +03:00
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return 8;
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default:
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return 0;
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}
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}
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2015-10-01 11:49:44 +03:00
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/* the values represent the positions in s390-virt.xml */
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#define S390_VIRT_CKC_REGNUM 0
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#define S390_VIRT_CPUTM_REGNUM 1
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#define S390_VIRT_BEA_REGNUM 2
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#define S390_VIRT_PREFIX_REGNUM 3
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2020-03-16 20:21:41 +03:00
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static int cpu_read_virt_reg(CPUS390XState *env, GByteArray *mem_buf, int n)
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2015-10-01 11:49:44 +03:00
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{
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switch (n) {
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case S390_VIRT_CKC_REGNUM:
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return gdb_get_regl(mem_buf, env->ckc);
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case S390_VIRT_CPUTM_REGNUM:
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return gdb_get_regl(mem_buf, env->cputm);
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case S390_VIRT_BEA_REGNUM:
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return gdb_get_regl(mem_buf, env->gbea);
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case S390_VIRT_PREFIX_REGNUM:
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return gdb_get_regl(mem_buf, env->psa);
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default:
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return 0;
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}
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}
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static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_VIRT_CKC_REGNUM:
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env->ckc = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
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cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
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return 8;
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case S390_VIRT_CPUTM_REGNUM:
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env->cputm = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
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cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
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return 8;
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case S390_VIRT_BEA_REGNUM:
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env->gbea = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
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cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
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return 8;
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case S390_VIRT_PREFIX_REGNUM:
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env->psa = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
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cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
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return 8;
|
2023-03-14 13:18:13 +03:00
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default:
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return 0;
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|
|
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}
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}
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/* the values represent the positions in s390-virt-kvm.xml */
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#define S390_VIRT_KVM_PP_REGNUM 0
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#define S390_VIRT_KVM_PFT_REGNUM 1
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#define S390_VIRT_KVM_PFS_REGNUM 2
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#define S390_VIRT_KVM_PFC_REGNUM 3
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static int cpu_read_virt_kvm_reg(CPUS390XState *env, GByteArray *mem_buf, int n)
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{
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switch (n) {
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case S390_VIRT_KVM_PP_REGNUM:
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return gdb_get_regl(mem_buf, env->pp);
|
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|
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case S390_VIRT_KVM_PFT_REGNUM:
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return gdb_get_regl(mem_buf, env->pfault_token);
|
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|
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case S390_VIRT_KVM_PFS_REGNUM:
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return gdb_get_regl(mem_buf, env->pfault_select);
|
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|
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case S390_VIRT_KVM_PFC_REGNUM:
|
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return gdb_get_regl(mem_buf, env->pfault_compare);
|
|
|
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default:
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return 0;
|
|
|
|
}
|
|
|
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}
|
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|
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|
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static int cpu_write_virt_kvm_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
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switch (n) {
|
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|
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case S390_VIRT_KVM_PP_REGNUM:
|
2015-10-01 11:49:44 +03:00
|
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|
env->pp = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
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|
cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
|
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|
return 8;
|
2023-03-14 13:18:13 +03:00
|
|
|
case S390_VIRT_KVM_PFT_REGNUM:
|
2015-10-01 11:49:44 +03:00
|
|
|
env->pfault_token = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
|
|
|
cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
|
|
|
return 8;
|
2023-03-14 13:18:13 +03:00
|
|
|
case S390_VIRT_KVM_PFS_REGNUM:
|
2015-10-01 11:49:44 +03:00
|
|
|
env->pfault_select = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
|
|
|
cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
|
|
|
return 8;
|
2023-03-14 13:18:13 +03:00
|
|
|
case S390_VIRT_KVM_PFC_REGNUM:
|
2015-10-01 11:49:44 +03:00
|
|
|
env->pfault_compare = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
|
|
|
cpu_synchronize_post_init(env_cpu(env));
|
2015-10-01 11:49:44 +03:00
|
|
|
return 8;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
2015-06-23 12:00:09 +03:00
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|
|
#endif
|
|
|
|
|
2017-03-08 14:41:14 +03:00
|
|
|
/* the values represent the positions in s390-gs.xml */
|
|
|
|
#define S390_GS_RESERVED_REGNUM 0
|
|
|
|
#define S390_GS_GSD_REGNUM 1
|
|
|
|
#define S390_GS_GSSM_REGNUM 2
|
|
|
|
#define S390_GS_GSEPLA_REGNUM 3
|
|
|
|
|
2020-03-16 20:21:41 +03:00
|
|
|
static int cpu_read_gs_reg(CPUS390XState *env, GByteArray *buf, int n)
|
2017-03-08 14:41:14 +03:00
|
|
|
{
|
2020-03-16 20:21:41 +03:00
|
|
|
return gdb_get_regl(buf, env->gscb[n]);
|
2017-03-08 14:41:14 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static int cpu_write_gs_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
|
|
|
|
env->gscb[n] = ldtul_p(mem_buf);
|
2019-03-23 02:07:18 +03:00
|
|
|
cpu_synchronize_post_init(env_cpu(env));
|
2017-03-08 14:41:14 +03:00
|
|
|
return 8;
|
|
|
|
}
|
|
|
|
|
2014-08-29 17:52:16 +04:00
|
|
|
void s390_cpu_gdb_init(CPUState *cs)
|
|
|
|
{
|
|
|
|
gdb_register_coprocessor(cs, cpu_read_ac_reg,
|
|
|
|
cpu_write_ac_reg,
|
2024-02-27 17:43:14 +03:00
|
|
|
gdb_find_static_feature("s390-acr.xml"), 0);
|
2014-08-29 17:52:16 +04:00
|
|
|
|
|
|
|
gdb_register_coprocessor(cs, cpu_read_fp_reg,
|
|
|
|
cpu_write_fp_reg,
|
2024-02-27 17:43:14 +03:00
|
|
|
gdb_find_static_feature("s390-fpr.xml"), 0);
|
2014-06-03 16:42:18 +04:00
|
|
|
|
|
|
|
gdb_register_coprocessor(cs, cpu_read_vreg,
|
|
|
|
cpu_write_vreg,
|
2024-02-27 17:43:14 +03:00
|
|
|
gdb_find_static_feature("s390-vx.xml"), 0);
|
2015-06-23 12:00:09 +03:00
|
|
|
|
2017-03-08 14:41:14 +03:00
|
|
|
gdb_register_coprocessor(cs, cpu_read_gs_reg,
|
|
|
|
cpu_write_gs_reg,
|
2024-02-27 17:43:14 +03:00
|
|
|
gdb_find_static_feature("s390-gs.xml"), 0);
|
2017-03-08 14:41:14 +03:00
|
|
|
|
2015-06-23 12:00:09 +03:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
gdb_register_coprocessor(cs, cpu_read_c_reg,
|
|
|
|
cpu_write_c_reg,
|
2024-02-27 17:43:14 +03:00
|
|
|
gdb_find_static_feature("s390-cr.xml"), 0);
|
2015-10-01 11:49:44 +03:00
|
|
|
|
2023-03-14 13:18:13 +03:00
|
|
|
gdb_register_coprocessor(cs, cpu_read_virt_reg,
|
|
|
|
cpu_write_virt_reg,
|
2024-02-27 17:43:14 +03:00
|
|
|
gdb_find_static_feature("s390-virt.xml"), 0);
|
2023-03-14 13:18:13 +03:00
|
|
|
|
2015-10-01 11:49:44 +03:00
|
|
|
if (kvm_enabled()) {
|
2023-03-14 13:18:13 +03:00
|
|
|
gdb_register_coprocessor(cs, cpu_read_virt_kvm_reg,
|
|
|
|
cpu_write_virt_kvm_reg,
|
2024-02-27 17:43:14 +03:00
|
|
|
gdb_find_static_feature("s390-virt-kvm.xml"),
|
2023-03-14 13:18:13 +03:00
|
|
|
0);
|
2015-10-01 11:49:44 +03:00
|
|
|
}
|
2015-06-23 12:00:09 +03:00
|
|
|
#endif
|
2013-07-07 14:54:12 +04:00
|
|
|
}
|