38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
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#include <stdlib.h>
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#include <stdint.h>
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#include <assert.h>
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#define MTFSF(FLM, FRB) asm volatile ("mtfsf %0, %1" :: "i" (FLM), "f" (FRB))
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#define MFFS(FRT) asm("mffs %0" : "=f" (FRT))
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#define MFFSCE(FRT) asm("mffsce %0" : "=f" (FRT))
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#define PPC_BIT_NR(nr) (63 - (nr))
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#define FP_VE (1ull << PPC_BIT_NR(56))
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#define FP_UE (1ull << PPC_BIT_NR(58))
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#define FP_ZE (1ull << PPC_BIT_NR(59))
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#define FP_XE (1ull << PPC_BIT_NR(60))
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#define FP_NI (1ull << PPC_BIT_NR(61))
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#define FP_RN1 (1ull << PPC_BIT_NR(63))
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int main(void)
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{
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uint64_t frt, fpscr;
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uint64_t test_value = FP_VE | FP_UE | FP_ZE |
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FP_XE | FP_NI | FP_RN1;
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MTFSF(0b11111111, test_value); /* set test value to cpu fpscr */
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MFFSCE(frt);
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MFFS(fpscr); /* read the value that mffsce stored to cpu fpscr */
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/* the returned value should be as the cpu fpscr was before */
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assert((frt & 0xff) == test_value);
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/*
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* the cpu fpscr last 3 bits should be unchanged
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* and enable bits should be unset
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*/
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assert((fpscr & 0xff) == (test_value & 0x7));
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return 0;
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}
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