qemu/target/xtensa/Makefile.objs

obj-y += core-dc232b.o
obj-y += core-dc233c.o
obj-y += core-de212.o
obj-y += core-fsf.o
obj-y += core-sample_controller.o
obj-y += core-test_kc705_be.o
obj-$(CONFIG_SOFTMMU) += monitor.o xtensa-semi.o
obj-y += xtensa-isa.o
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += gdbstub.o
build: move obj-TARGET-y variables to nested Makefile.objs Also drop duplicate occurrence of device-hotplug.o. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 2012-05-29 12:23:15 +04:00			`obj-y += core-dc232b.o`
			`obj-y += core-dc233c.o`
target/xtensa: add de212 core DE212 is a noMMU core supported in linux. Import this core to provide true noMMU configuration for xtensa linux to run on QEMU. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2018-01-11 21:56:14 +03:00			`obj-y += core-de212.o`
build: move obj-TARGET-y variables to nested Makefile.objs Also drop duplicate occurrence of device-hotplug.o. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 2012-05-29 12:23:15 +04:00			`obj-y += core-fsf.o`
target/xtensa: add sample_controller core The sample_controller core is a simple noMMU general purpose core, modern analog of de212. It is used as a default core in the xtensa port of Zephyr. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2018-01-11 22:13:01 +03:00			`obj-y += core-sample_controller.o`
target/xtensa: add test_kc705_be core This is big-endian core with HiFi2 instructions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2018-08-20 04:34:27 +03:00			`obj-y += core-test_kc705_be.o`
target/xtensa: add linux-user support Import list of syscalls from the kernel source. Conditionalize code/data that is only used with softmmu. Implement exception handlers. Implement signal hander (only the core registers for now, no coprocessors or TIE). Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2017-01-25 21:54:11 +03:00			`obj-$(CONFIG_SOFTMMU) += monitor.o xtensa-semi.o`
target/xtensa: import libisa source The canonical way of dealing with Xtensa instructions decoding and encoding is through the libisa. Libisa is a configuration-independent library with a stable interface plus generated configuration-specific xtensa-modules.c file with implementations of decoding and encoding functions. Libisa is MIT-licensed and originally disributed xtensa-modules.c files are also MIT-licensed and are available as a part of xtensa configuration overlay. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2016-11-22 21:08:02 +03:00			`obj-y += xtensa-isa.o`
build: move other target-*/ objects to nested Makefile.objs Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 2012-05-29 13:48:59 +04:00			`obj-y += translate.o op_helper.o helper.o cpu.o`
cpu: Introduce CPUClass::gdb_{read,write}_register() Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de> 2013-06-29 06:18:45 +04:00			`obj-y += gdbstub.o`