2020-09-14 11:13:40 +03:00
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/*
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* CTU CAN FD device emulation
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* http://canbus.pages.fel.cvut.cz/
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*
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* Copyright (c) 2019 Jan Charvat (jancharvat.charvat@gmail.com)
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*
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* Based on Kvaser PCI CAN device (SJA1000 based) emulation implemented by
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* Jin Yang and Pavel Pisa
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_CAN_CTUCAN_CORE_H
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#define HW_CAN_CTUCAN_CORE_H
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#include "exec/hwaddr.h"
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#include "net/can_emu.h"
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2020-11-11 00:52:49 +03:00
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#ifndef HOST_WORDS_BIGENDIAN
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2020-09-14 11:13:40 +03:00
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#define __LITTLE_ENDIAN_BITFIELD 1
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#endif
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#include "ctu_can_fd_frame.h"
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#include "ctu_can_fd_regs.h"
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#define CTUCAN_CORE_MEM_SIZE 0x500
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/* The max size for a message in FIFO */
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#define CTUCAN_MSG_MAX_LEN (CTU_CAN_FD_DATA_1_4_W + 64)
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/* The receive buffer size. */
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#define CTUCAN_RCV_BUF_LEN (1024 * 8)
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/* The max size for a message buffer */
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#define CTUCAN_CORE_MSG_MAX_LEN 0x50
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/* The receive buffer size. */
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#define CTUCAN_CORE_RCV_BUF_LEN 0x1000
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#define CTUCAN_CORE_TXBUF_NUM 4
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typedef struct CtuCanCoreMsgBuffer {
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uint8_t data[CTUCAN_CORE_MSG_MAX_LEN];
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} CtuCanCoreMsgBuffer;
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typedef struct CtuCanCoreState {
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union ctu_can_fd_mode_settings mode_settings;
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union ctu_can_fd_status status;
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union ctu_can_fd_int_stat int_stat;
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union ctu_can_fd_int_ena_set int_ena;
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union ctu_can_fd_int_mask_set int_mask;
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union ctu_can_fd_btr brt;
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union ctu_can_fd_btr_fd brt_fd;
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union ctu_can_fd_ewl_erp_fault_state ewl_erp_fault_state;
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union ctu_can_fd_rec_tec rec_tec;
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union ctu_can_fd_err_norm_err_fd err_norm_err_fd;
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union ctu_can_fd_ctr_pres ctr_pres;
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union ctu_can_fd_filter_a_mask filter_a_mask;
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union ctu_can_fd_filter_a_val filter_a_val;
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union ctu_can_fd_filter_b_mask filter_b_mask;
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union ctu_can_fd_filter_b_val filter_b_val;
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union ctu_can_fd_filter_c_mask filter_c_mask;
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union ctu_can_fd_filter_c_val filter_c_val;
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union ctu_can_fd_filter_ran_low filter_ran_low;
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union ctu_can_fd_filter_ran_high filter_ran_high;
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union ctu_can_fd_filter_control_filter_status filter_control_filter_status;
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union ctu_can_fd_rx_mem_info rx_mem_info;
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union ctu_can_fd_rx_pointers rx_pointers;
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union ctu_can_fd_rx_status_rx_settings rx_status_rx_settings;
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union ctu_can_fd_tx_status tx_status;
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union ctu_can_fd_tx_priority tx_priority;
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union ctu_can_fd_err_capt_alc err_capt_alc;
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union ctu_can_fd_trv_delay_ssp_cfg trv_delay_ssp_cfg;
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union ctu_can_fd_rx_fr_ctr rx_fr_ctr;
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union ctu_can_fd_tx_fr_ctr tx_fr_ctr;
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union ctu_can_fd_debug_register debug_register;
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union ctu_can_fd_yolo_reg yolo_reg;
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union ctu_can_fd_timestamp_low timestamp_low;
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union ctu_can_fd_timestamp_high timestamp_high;
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CtuCanCoreMsgBuffer tx_buffer[CTUCAN_CORE_TXBUF_NUM];
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uint8_t rx_buff[CTUCAN_RCV_BUF_LEN]; /* 32~95 .. 64bytes Rx FIFO */
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uint32_t rx_tail_pos; /* Count by bytes. */
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uint32_t rx_cnt; /* Count by bytes. */
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uint32_t rx_frame_rem;
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qemu_irq irq;
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CanBusClientState bus_client;
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} CtuCanCoreState;
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void ctucan_hardware_reset(CtuCanCoreState *s);
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void ctucan_mem_write(CtuCanCoreState *s, hwaddr addr, uint64_t val,
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unsigned size);
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uint64_t ctucan_mem_read(CtuCanCoreState *s, hwaddr addr, unsigned size);
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int ctucan_connect_to_bus(CtuCanCoreState *s, CanBusState *bus);
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void ctucan_disconnect(CtuCanCoreState *s);
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int ctucan_init(CtuCanCoreState *s, qemu_irq irq);
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bool ctucan_can_receive(CanBusClientState *client);
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ssize_t ctucan_receive(CanBusClientState *client,
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const qemu_can_frame *frames, size_t frames_cnt);
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extern const VMStateDescription vmstate_ctucan;
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#endif
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