qemu/tcg/aarch64/tcg-target.opc.h

/* Target-specific opcodes for host vector expansion.  These will be
   emitted by tcg_expand_vec_op.  For those familiar with GCC internals,
   consider these to be UNSPEC with names.  */

DEF(aa64_sshl_vec, 1, 2, 0, IMPLVEC)
tcg/aarch64: Add vector operations Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2017-09-12 08:09:28 +03:00			`/* Target-specific opcodes for host vector expansion. These will be`
			`emitted by tcg_expand_vec_op. For those familiar with GCC internals,`
			`consider these to be UNSPEC with names. */`
tcg/aarch64: Support vector variable shift opcodes Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2019-04-15 07:31:23 +03:00
			`DEF(aa64_sshl_vec, 1, 2, 0, IMPLVEC)`